Belle II Software development
trg-grl-writedb.cc
1/**************************************************************************
2 * basf2 (Belle II Analysis Software Framework) *
3 * Author: The Belle II Collaboration *
4 * *
5 * See git log for contributors and copyright holders. *
6 * This file is licensed under LGPL-3.0, see LICENSE.md. *
7 **************************************************************************/
8
9#include <framework/database/DBImportObjPtr.h>
10#include <trg/grl/dbobjects/TRGGRLConfig.h>
11#include <fstream>
12#include <iostream>
13#include <sstream>
14
15using namespace Belle2;
16
17#define ONLINE 0
18//#define ONLINE 1
19
20void setgrlconfig()
21{
22
23 //number of network. now it is 1, tauNN only. Maximum 10.
24 const int N_config = 1;
25
26 const int run[N_config][4] = { //itnitial exp, initial run, end exp, end run
27 {0, 0, -1, -1} // 0
28 };
29
30 // 10 thresholds for 10 MLP outputs: any output[i] > threshold[i] triggers TauNN
31 std::vector<float> ecltaunn_threshold[N_config] = {
32 {
33 -0.6015625, -1.001953125, -0.568359375, -0.939453125, -1.111328125,
34 -0.583984375, -0.708984375, -0.37890625, -0.474609375, -0.591796875
35 }
36 };
37 // firmware: 6 dense layers (Dense 0-5)
38 unsigned ecltaunn_nMLP[N_config] = {
39 1
40 };
41 bool ecltaunn_multiplyHidden[N_config] = {
42 false
43 };
44 std::vector<std::vector<float>> ecltaunn_nHidden[N_config];
45 // firmware: 24 -> 64 -> 64 -> 64 -> 64 -> 64 -> 10 (input + 5 hidden + output)
46 std::vector<float> eclaunn_nHidden_0 = {64, 64, 64, 64, 64};
47 ecltaunn_nHidden[0].push_back(eclaunn_nHidden_0);
48 // Number of output nodes
49 std::vector<unsigned> ecltaunn_nOutput[N_config] = {
50 {10}
51 };
52 unsigned ecltaunn_n_cdc_sector[N_config] = {
53 0
54 };
55 unsigned ecltaunn_n_ecl_sector[N_config] = {
56 1
57 };
58 std::vector<float> ecltaunn_i_cdc_sector[N_config];
59 ecltaunn_i_cdc_sector[0].push_back(0 * 35 * 3);
60
61 std::vector<float> ecltaunn_i_ecl_sector[N_config]; //only 24 is supported for now
62 ecltaunn_i_ecl_sector[0].push_back(1 * 6 * 4);
63
64 // firmware: 6 dense layer weight files, merged in order
65 // w3.txt(24*64=1536) + w6.txt(64*64=4096) + w9.txt(64*64=4096) + w12.txt(64*64=4096) + w15.txt(64*64=4096) + w18.txt(64*10=640) = 18560
66 const char* weight_files[] = {
67 "./weights/w3.txt",
68 "./weights/w6.txt",
69 "./weights/w9.txt",
70 "./weights/w12.txt",
71 "./weights/w15.txt",
72 "./weights/w18.txt"
73 };
74 const char* bias_files[] = {
75 "./weights/b3.txt",
76 "./weights/b6.txt",
77 "./weights/b9.txt",
78 "./weights/b12.txt",
79 "./weights/b15.txt",
80 "./weights/b18.txt"
81 };
82
83 // Load and merge all weight files
84 std::vector<std::vector<float>> ecltaunn_weight[N_config];
85 for (int i = 0; i < N_config; i++) {
86 std::vector<float> all_weights;
87 for (unsigned j = 0; j < 6; j++) { // 6 weight files
88 std::ifstream wfile(weight_files[j]);
89 if (!wfile.is_open()) {
90 std::cout << "trg-grl-writedb: cannot open weight file: " << weight_files[j] << std::endl;
91 return;
92 }
93 std::cout << "trg-grl-writedb: loading weight file: " << weight_files[j] << std::endl;
94
95 // Read entire file content, replace commas with spaces
96 std::stringstream buffer;
97 buffer << wfile.rdbuf();
98 std::string content = buffer.str();
99
100 // Replace commas with spaces
101 for (char& c : content) {
102 if (c == ',') c = ' ';
103 }
104
105 // Read all floats from processed string
106 std::stringstream ss(content);
107 float element;
108 int count = 0;
109 while (ss >> element) {
110 all_weights.push_back(element);
111 count++;
112 if (count <= 3) {
113 std::cout << " element[" << (count - 1) << "] = " << element << std::endl;
114 }
115 }
116 std::cout << " file loaded " << count << " elements" << std::endl;
117 std::cout << " loaded " << all_weights.size() << " total elements so far" << std::endl;
118 }
119 ecltaunn_weight[i] = std::vector<std::vector<float>> { all_weights }; // One MLP expert contains all weights
120 std::cout << "trg-grl-writedb: loaded weights total: " << all_weights.size() << " elements" << std::endl;
121 }
122
123 // Load and merge all bias files
124 std::vector<std::vector<float>> ecltaunn_bias[N_config];
125 for (int i = 0; i < N_config; i++) {
126 std::vector<float> all_biases;
127 for (unsigned j = 0; j < 6; j++) { // 6 bias files
128 std::ifstream bfile(bias_files[j]);
129 if (!bfile.is_open()) {
130 std::cout << "trg-grl-writedb: cannot open bias file: " << bias_files[j] << std::endl;
131 return;
132 }
133 std::cout << "trg-grl-writedb: loading bias file: " << bias_files[j] << std::endl;
134
135 // Read entire file content, replace commas with spaces
136 std::stringstream buffer;
137 buffer << bfile.rdbuf();
138 std::string content = buffer.str();
139
140 // Replace commas with spaces
141 for (char& c : content) {
142 if (c == ',') c = ' ';
143 }
144
145 // Read all floats from processed string
146 std::stringstream ss(content);
147 float element;
148 int count = 0;
149 while (ss >> element) {
150 all_biases.push_back(element);
151 count++;
152 }
153 std::cout << " file loaded " << count << " elements" << std::endl;
154 }
155 ecltaunn_bias[i] = std::vector<std::vector<float>> { all_biases }; // One MLP expert contains all biases
156 std::cout << "trg-grl-writedb: loaded biases: " << all_biases.size() << " elements" << std::endl;
157 }
158
159 // firmware: 6 layers (Dense_0, Dense_1, Dense_2, Dense_3, Dense_4, Dense_5)
160 // bias params: Layer 0-3 use ap_ufixed<2,32>, Layer 4 uses ap_fixed<4,2>, Layer 5 uses ap_fixed<6,1>
161 std::vector<std::vector<int>> total_bit_bias[N_config] = {
162 {{ 2, 2, 2, 2, 4, 6 }} // total bits
163 };
164 std::vector<std::vector<int>> int_bit_bias[N_config] {
165 {{ 32, 32, 32, 32, 2, 1 }} // integer bits
166 };
167 std::vector<std::vector<bool>> is_signed_bias[N_config] {
168 {{ false, false, false, false, true, true }}
169 };
170 std::vector<std::vector<int>> rounding_bias[N_config] {
171 {{ 0, 0, 0, 0, 0, 0 }} // 0 = truncate
172 };
173 std::vector<std::vector<int>> saturation_bias[N_config] {
174 {{ 2, 2, 2, 2, 2, 2 }} // 2 = saturate
175 };
176
178 // firmware accum params: ap_fixed<18,16>, ap_fixed<17,16>, ap_fixed<15,15>, ap_fixed<13,9>, ap_fixed<17,8>, ap_fixed<19,10>
179 std::vector<std::vector<int>> total_bit_accum[N_config] {
180 {{ 18, 17, 15, 13, 17, 19 }}
181 };
182 std::vector<std::vector<int>> int_bit_accum[N_config] {
183 {{ 16, 16, 15, 9, 8, 10 }}
184 };
185 std::vector<std::vector<bool>> is_signed_accum[N_config] {
186 {{ true, true, true, true, true, true }}
187 };
188 std::vector<std::vector<int>> rounding_accum[N_config] {
189 {{ 1, 1, 1, 1, 1, 1 }} // 1 = round (AP_RND)
190 };
191 std::vector<std::vector<int>> saturation_accum[N_config] {
192 {{ 2, 2, 2, 2, 2, 2 }} // 2 = wrap
193 };
195 // firmware weight params: ap_fixed<9,4>, ap_fixed<7,3>, ap_fixed<6,2>, ap_ufixed<6,0>, ap_fixed<10,1>, ap_fixed<7,1>
196 std::vector<std::vector<int>> total_bit_weight[N_config] = {
197 {{ 9, 7, 6, 6, 10, 7 }}
198 };
199 std::vector<std::vector<int>> int_bit_weight[N_config] = {
200 {{ 4, 3, 2, 0, 1, 1 }}
201 };
202 std::vector<std::vector<bool>> is_signed_weight[N_config] = {
203 {{ true, true, true, false, true, true }} // Layer 3 is unsigned (ap_ufixed)
204 };
205 std::vector<std::vector<int>> rounding_weight[N_config] = {
206 {{ 0, 0, 0, 0, 0, 0 }} // 0 = truncate
207 };
208 std::vector<std::vector<int>> saturation_weight[N_config] = {
209 {{ 2, 2, 2, 2, 2, 2 }} // 2 = wrap
210 };
211
213 // firmware relu params: ap_fixed<14,14>, ap_fixed<13,13>, ap_fixed<12,12>, ap_ufixed<9,8>, ap_ufixed<13,7>
214 std::vector<std::vector<int>> total_bit_relu[N_config] = {
215 {{ 14, 13, 12, 9, 13 }} // 5 relu layers (Layer 0-4, last layer has no relu)
216 };
217 std::vector<std::vector<int>> int_bit_relu[N_config] = {
218 {{ 14, 13, 12, 8, 7 }}
219 };
220 std::vector<std::vector<bool>> is_signed_relu[N_config] = {
221 {{ true, true, true, false, false }} // Layer 3, 4 are unsigned
222 };
223 std::vector<std::vector<int>> rounding_relu[N_config] = {
224 {{ 0, 0, 0, 0, 0 }} // 0 = truncate
225 };
226 std::vector<std::vector<int>> saturation_relu[N_config] = {
227 {{ 2, 2, 2, 2, 2 }} // 2 = saturate
228 };
229
231 // firmware general quantization params: ap_fixed<16,16>, ap_fixed<16,16>, ap_fixed<15,15>, ap_fixed<10,9>
232 std::vector<std::vector<int>> total_bit[N_config] {
233 {{ 16, 16, 15, 10, 14 }}
234 };
235 std::vector<std::vector<int>> int_bit[N_config] {
236 {{ 16, 16, 15, 9, 8 }}
237 };
238 std::vector<std::vector<bool>> is_signed[N_config] {
239 {{ true, true, true, true, true }}
240 };
241 std::vector<std::vector<int>> rounding[N_config] {
242 {{ 1, 1, 1, 1, 1 }} // 1 = round
243 };
244 std::vector<std::vector<int>> saturation[N_config] {
245 {{ 2, 2, 2, 2, 2 }}
246 };
247
248
249 // firmware: 5 hidden layers (Dense_0-4), 64 neurons each
250 // dense_0_iq: ap_fixed<12,13>, dense_1_iq: ap_fixed<14,14>, dense_2_iq: ap_fixed<13,13>
251 // dense_3_iq: ap_fixed<12,12>, dense_4_iq: ap_ufixed<9,9>
252 // TRGGRLConfig expects 3D: [MLP][layer][neuron] but since nMLP=1, it's [1][5][64]
253 // To simplify, use 2D and wrap in 3D when setting to db
254 std::vector<std::vector<int>> W_input_2d[N_config];
255 std::vector<std::vector<int>> I_input_2d[N_config];
256 for (int i = 0; i < N_config; i++) {
257 // Layer 0 (dense_1_iq): 64 inputs, sparse quantization
258 // Non-zero entries from firmware: out[i] = ap_fixed<W,I>(inp[i])
259 // out[i] = 0 means input is zeroed
260 W_input_2d[i].push_back(std::vector<int> {
261 0, 0, 0, 0, 0, 10, 0, 0, 0, 0, 0, 0, 0, 8, 0, 9, 0, 5, 6, 6,
262 0, 0, 0, 7, 0, 8, 7, 0, 0, 0, 0, 0, 0, 0, 9, 0, 0, 7, 5, 6,
263 8, 0, 0, 0, 0, 0, 0, 0, 0, 0, 6, 0, 0, 0, 6, 6, 5, 0, 6, 8,
264 0, 9, 9, 0
265 });
266 I_input_2d[i].push_back(std::vector<int> {
267 0, 0, 0, 0, 0, 13, 0, 0, 0, 0, 0, 0, 0, 13, 0, 13, 0, 10, 11, 11,
268 0, 0, 0, 12, 0, 12, 12, 0, 0, 0, 0, 0, 0, 0, 13, 0, 0, 13, 10, 10,
269 12, 0, 0, 0, 0, 0, 0, 0, 0, 0, 11, 0, 0, 0, 10, 11, 11, 0, 11, 12,
270 0, 12, 14, 0
271 });
272 // Layer 1 (dense_2_iq): 64 inputs, sparse quantization
273 W_input_2d[i].push_back(std::vector<int> {
274 0, 0, 0, 0, 6, 0, 0, 0, 0, 0, 0, 8, 0, 7, 0, 0, 0, 0, 0, 0,
275 7, 0, 0, 6, 0, 0, 0, 0, 0, 8, 0, 0, 0, 0, 0, 0, 8, 0, 10, 0,
276 0, 6, 0, 0, 0, 0, 7, 0, 0, 0, 0, 7, 0, 0, 0, 0, 0, 0, 0, 0,
277 0, 0, 0, 8
278 });
279 I_input_2d[i].push_back(std::vector<int> {
280 0, 0, 0, 0, 11, 0, 0, 0, 0, 0, 0, 12, 0, 12, 0, 0, 0, 0, 0, 0,
281 12, 0, 0, 11, 0, 0, 0, 0, 0, 13, 0, 0, 0, 0, 0, 0, 13, 0, 13, 0,
282 0, 11, 0, 0, 0, 0, 12, 0, 0, 0, 0, 12, 0, 0, 0, 0, 0, 0, 0, 0,
283 0, 0, 0, 13
284 });
285 // Layer 2 (dense_3_iq): 64 inputs, sparse quantization
286 W_input_2d[i].push_back(std::vector<int> {
287 0, 0, 0, 0, 0, 0, 0, 0, 0, 9, 0, 0, 0, 7, 0, 0, 0, 0, 0, 0,
288 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
289 0, 0, 0, 0, 0, 0, 0, 0, 7, 0, 0, 0, 0, 0, 0, 9, 0, 0, 0, 0,
290 0, 0, 0, 0
291 });
292 I_input_2d[i].push_back(std::vector<int> {
293 0, 0, 0, 0, 0, 0, 0, 0, 0, 11, 0, 0, 0, 11, 0, 0, 0, 0, 0, 0,
294 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
295 0, 0, 0, 0, 0, 0, 0, 0, 11, 0, 0, 0, 0, 0, 0, 12, 0, 0, 0, 0,
296 0, 0, 0, 0
297 });
298 // Layer 3 (dense_4_iq): 64 inputs, sparse quantization (ap_ufixed)
299 W_input_2d[i].push_back(std::vector<int> {
300 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
301 9, 0, 0, 0, 0, 0, 0, 0, 8, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
302 8, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
303 0, 0, 0, 0
304 });
305 I_input_2d[i].push_back(std::vector<int> {
306 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
307 9, 0, 0, 0, 0, 0, 0, 0, 8, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
308 8, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
309 0, 0, 0, 0
310 });
311 // Layer 4 (dense_5_iq): 64 inputs, sparse quantization (ap_ufixed)
312 W_input_2d[i].push_back(std::vector<int> {
313 0, 0, 0, 0, 0, 0, 10, 0, 0, 0, 0, 0, 0, 0, 0, 12, 0, 0, 0, 0,
314 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
315 0, 0, 0, 0, 0, 0, 0, 0, 0, 11, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
316 0, 0, 0, 0
317 });
318 I_input_2d[i].push_back(std::vector<int> {
319 0, 0, 0, 0, 0, 0, 7, 0, 0, 0, 0, 0, 0, 0, 0, 7, 0, 0, 0, 0,
320 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
321 0, 0, 0, 0, 0, 0, 0, 0, 0, 8, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
322 0, 0, 0, 0
323 });
324 }
325 // Wrap 2D in 3D for TRGGRLConfig (which expects 3D)
326 std::vector<std::vector<std::vector<int>>> W_input[N_config];
327 std::vector<std::vector<std::vector<int>>> I_input[N_config];
328 for (int i = 0; i < N_config; i++) {
329 W_input[i].push_back(W_input_2d[i]); // MLP 0
330 I_input[i].push_back(I_input_2d[i]); // MLP 0
331 }
332 std::cout << " W_input[0].size=" << W_input[0].size() << " (should be 1)" << std::endl;
333 if (W_input[0].size() > 0) {
334 std::cout << " W_input[0][0].size=" << W_input[0][0].size() << " (should be 5 layers)" << std::endl;
335 if (W_input[0][0].size() > 0) {
336 std::cout << " W_input[0][0][0].size=" << W_input[0][0][0].size() << " (should be 64 neurons)" << std::endl;
337 }
338 }
339
340 // Input layer quantization parameters for the first dense layer (24 inputs)
341 // firmware dense_0_iq uses per-input ap_fixed types (W, I):
342 // out[0]=<10,13>, [1]=<11,13>, [2]=<10,13>, [3]=<9,12>, [4]=<8,11>, [5]=<6,10>,
343 // [6]=<8,9>, [7]=<8,9>, [8]=<5,9>, [9]=<5,9>, [10]=<5,9>, [11]=<4,9>,
344 // [12]=<5,10>, [13]=<5,10>, [14]=<4,10>, [15]=<4,10>, [16]=<3,10>, [17]=<3,10>,
345 // [18]=<5,10>, [19]=<5,10>, [20]=<5,10>, [21]=<3,10>, [22]=<3,10>, [23]=<3,10>
346 // W_input_layer: 1 layer, 24 total_bit values
347 std::vector<std::vector<std::vector<int>>> W_input_layer[N_config] {
348 {
349 {
350 { 10, 11, 10, 9, 8, 6, 8, 8, 5, 5, 5, 4, 5, 5, 4, 4, 3, 3, 5, 5, 5, 3, 3, 3 }
351 }
352 }
353 };
354 // I_input_layer: 1 layer, 24 int_bit values
355 std::vector<std::vector<std::vector<int>>> I_input_layer[N_config] {
356 {
357 {
358 { 13, 13, 13, 12, 11, 10, 9, 9, 9, 9, 9, 9, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10 }
359 }
360 }
361 };
362
363
364 DBImportObjPtr<TRGGRLConfig> db_grlconfig;
365 db_grlconfig.construct();
366 if (ONLINE == 0) {
367 for (int i = 0; i < N_config; i++) {
368 IntervalOfValidity iov(run[i][0], run[i][1], run[i][2], run[i][3]);
369 db_grlconfig->set_ecltaunn_threshold(ecltaunn_threshold[i]);
370 db_grlconfig->set_ecltaunn_nMLP(ecltaunn_nMLP[i]);
371 db_grlconfig->set_ecltaunn_multiplyHidden(ecltaunn_multiplyHidden[i]);
372 db_grlconfig->set_ecltaunn_nHidden(ecltaunn_nHidden[i]);
373 db_grlconfig->set_ecltaunn_nOutput(ecltaunn_nOutput[i]);
374 db_grlconfig->set_ecltaunn_n_cdc_sector(ecltaunn_n_cdc_sector[i]);
375 db_grlconfig->set_ecltaunn_n_ecl_sector(ecltaunn_n_ecl_sector[i]);
376 db_grlconfig->set_ecltaunn_i_cdc_sector(ecltaunn_i_cdc_sector[i]);
377 db_grlconfig->set_ecltaunn_i_ecl_sector(ecltaunn_i_ecl_sector[i]);
378 db_grlconfig->set_ecltaunn_weight(ecltaunn_weight[i]);
379 db_grlconfig->set_ecltaunn_bias(ecltaunn_bias[i]);
380 db_grlconfig->set_ecltaunn_total_bit_bias(total_bit_bias[i]);
381 db_grlconfig->set_ecltaunn_int_bit_bias(int_bit_bias[i]);
382 db_grlconfig->set_ecltaunn_is_signed_bias(is_signed_bias[i]);
383 db_grlconfig->set_ecltaunn_rounding_bias(rounding_bias[i]);
384 db_grlconfig->set_ecltaunn_saturation_bias(saturation_bias[i]);
385 db_grlconfig->set_ecltaunn_total_bit_accum(total_bit_accum[i]);
386 db_grlconfig->set_ecltaunn_int_bit_accum(int_bit_accum[i]);
387 db_grlconfig->set_ecltaunn_is_signed_accum(is_signed_accum[i]);
388 db_grlconfig->set_ecltaunn_rounding_accum(rounding_accum[i]);
389 db_grlconfig->set_ecltaunn_saturation_accum(saturation_accum[i]);
390 db_grlconfig->set_ecltaunn_total_bit_weight(total_bit_weight[i]);
391 db_grlconfig->set_ecltaunn_int_bit_weight(int_bit_weight[i]);
392 db_grlconfig->set_ecltaunn_is_signed_weight(is_signed_weight[i]);
393 db_grlconfig->set_ecltaunn_rounding_weight(rounding_weight[i]);
394 db_grlconfig->set_ecltaunn_saturation_weight(saturation_weight[i]);
395 db_grlconfig->set_ecltaunn_total_bit_relu(total_bit_relu[i]);
396 db_grlconfig->set_ecltaunn_int_bit_relu(int_bit_relu[i]);
397 db_grlconfig->set_ecltaunn_is_signed_relu(is_signed_relu[i]);
398 db_grlconfig->set_ecltaunn_rounding_relu(rounding_relu[i]);
399 db_grlconfig->set_ecltaunn_saturation_relu(saturation_relu[i]);
400 db_grlconfig->set_ecltaunn_total_bit(total_bit[i]);
401 db_grlconfig->set_ecltaunn_int_bit(int_bit[i]);
402 db_grlconfig->set_ecltaunn_is_signed(is_signed[i]);
403 db_grlconfig->set_ecltaunn_rounding(rounding[i]);
404 db_grlconfig->set_ecltaunn_saturation(saturation[i]);
405 db_grlconfig->set_ecltaunn_W_input(W_input[i]);
406 db_grlconfig->set_ecltaunn_I_input(I_input[i]);
407 db_grlconfig->set_ecltaunn_W_input_layer(W_input_layer[i][0]);
408 db_grlconfig->set_ecltaunn_I_input_layer(I_input_layer[i][0]);
409
410 db_grlconfig.import(iov);
411 }
412 } else if (ONLINE == 1) {
413 for (int i = N_config - 1; i < N_config; i++) {
414 IntervalOfValidity iov(0, 0, -1, -1);
415 db_grlconfig->set_ecltaunn_threshold(ecltaunn_threshold[i]);
416 db_grlconfig->set_ecltaunn_nMLP(ecltaunn_nMLP[i]);
417 db_grlconfig->set_ecltaunn_multiplyHidden(ecltaunn_multiplyHidden[i]);
418 db_grlconfig->set_ecltaunn_nHidden(ecltaunn_nHidden[i]);
419 db_grlconfig->set_ecltaunn_nOutput(ecltaunn_nOutput[i]);
420 db_grlconfig->set_ecltaunn_n_cdc_sector(ecltaunn_n_cdc_sector[i]);
421 db_grlconfig->set_ecltaunn_n_ecl_sector(ecltaunn_n_ecl_sector[i]);
422 db_grlconfig->set_ecltaunn_i_cdc_sector(ecltaunn_i_cdc_sector[i]);
423 db_grlconfig->set_ecltaunn_i_ecl_sector(ecltaunn_i_ecl_sector[i]);
424 db_grlconfig->set_ecltaunn_weight(ecltaunn_weight[i]);
425 db_grlconfig->set_ecltaunn_bias(ecltaunn_bias[i]);
426 db_grlconfig->set_ecltaunn_total_bit_bias(total_bit_bias[i]);
427 db_grlconfig->set_ecltaunn_int_bit_bias(int_bit_bias[i]);
428 db_grlconfig->set_ecltaunn_is_signed_bias(is_signed_bias[i]);
429 db_grlconfig->set_ecltaunn_rounding_bias(rounding_bias[i]);
430 db_grlconfig->set_ecltaunn_saturation_bias(saturation_bias[i]);
431 db_grlconfig->set_ecltaunn_total_bit_accum(total_bit_accum[i]);
432 db_grlconfig->set_ecltaunn_int_bit_accum(int_bit_accum[i]);
433 db_grlconfig->set_ecltaunn_is_signed_accum(is_signed_accum[i]);
434 db_grlconfig->set_ecltaunn_rounding_accum(rounding_accum[i]);
435 db_grlconfig->set_ecltaunn_saturation_accum(saturation_accum[i]);
436 db_grlconfig->set_ecltaunn_total_bit_weight(total_bit_weight[i]);
437 db_grlconfig->set_ecltaunn_int_bit_weight(int_bit_weight[i]);
438 db_grlconfig->set_ecltaunn_is_signed_weight(is_signed_weight[i]);
439 db_grlconfig->set_ecltaunn_rounding_weight(rounding_weight[i]);
440 db_grlconfig->set_ecltaunn_saturation_weight(saturation_weight[i]);
441 db_grlconfig->set_ecltaunn_total_bit_relu(total_bit_relu[i]);
442 db_grlconfig->set_ecltaunn_int_bit_relu(int_bit_relu[i]);
443 db_grlconfig->set_ecltaunn_is_signed_relu(is_signed_relu[i]);
444 db_grlconfig->set_ecltaunn_rounding_relu(rounding_relu[i]);
445 db_grlconfig->set_ecltaunn_saturation_relu(saturation_relu[i]);
446 db_grlconfig->set_ecltaunn_total_bit(total_bit[i]);
447 db_grlconfig->set_ecltaunn_int_bit(int_bit[i]);
448 db_grlconfig->set_ecltaunn_is_signed(is_signed[i]);
449 db_grlconfig->set_ecltaunn_rounding(rounding[i]);
450 db_grlconfig->set_ecltaunn_saturation(saturation[i]);
451 db_grlconfig->set_ecltaunn_W_input(W_input[i]);
452 db_grlconfig->set_ecltaunn_I_input(I_input[i]);
453 db_grlconfig->set_ecltaunn_W_input_layer(W_input_layer[i][0]);
454 db_grlconfig->set_ecltaunn_I_input_layer(I_input_layer[i][0]);
455
456 db_grlconfig.import(iov);
457 }
458 }
459}
460
461int main()
462{
463
464 setgrlconfig();
465
466}
467
468
bool import(const IntervalOfValidity &iov)
Import the object to database.
Class for importing a single object to the database.
void construct(Args &&... params)
Construct an object of type T in this DBImportObjPtr using the provided constructor arguments.
A class that describes the interval of experiments/runs for which an object in the database is valid.
Abstract base class for different kinds of events.