Belle II Software  release-05-01-25
TrgEcl.py
1 #!/usr/bin/env python
2 # -*- coding: utf-8 -*-
3 # -------------------------------------------------------------------------------------------------------
4 # TSim-ecl example code.
5 # -------------------------------------------------------------------------------------------------------
6 # In order to test Tsim-ecl code, you need a root file which has ECLHit table.(after Gsim)
7 # ex)
8 # commend > basf2 TrgEcl.py [Name of Gsim root file] [Name of output root file]
9 # -------------------------------------------------------------------------------------------------------
10 import os
11 from basf2 import *
12 from L1trigger import add_tsim
13 
14 import sys # get argv
15 argvs = sys.argv # get arg
16 argc = len(argvs) # of arg
17 if argc != 3:
18  sys.exit("ztsim02.py> # of arg is strange. Exit.")
19 if argc == 3:
20  f_in_root = argvs[1]
21  f_out_root = argvs[2]
22 # print
23 # print 'f_in_root = %s' % f_in_root
24 # print 'f_out_root = %s\n' % f_out_root
25 
26 
27 
28 set_log_level(LogLevel.ERROR)
29 # set_log_level(LogLevel.INFO)
30 # set_log_level(LogLevel.DEBUG)
31 # use_local_database('./trg_ecl/database.txt')
32 
33 gearbox = register_module('Gearbox')
34 
35 # input
36 rootinput1 = register_module('RootInput')
37 rootinput1.param('inputFileName', f_in_root)
38 
39 
40 # output
41 rootoutput = register_module('RootOutput')
42 rootoutput.param('outputFileName', f_out_root)
43 
44 # import random
45 progress = register_module('Progress')
46 
47 
48 # Create paths
49 main = create_path()
50 
51 main.add_module(rootinput1)
52 
53 main.add_module(progress)
54 main.add_module(gearbox)
55 
56 add_tsim(main, component=["ECL"])
57 
58 
59 main.add_module(rootoutput, branchNames=["TRGECLTrgs", "TRGECLHits", "TRGECLClusters"])
60 
61 
62 # main
63 process(main)
64 
67 print(statistics)
68 # ===<END>