Belle II Software  release-08-01-10
trggdlDQM.py
1 #!/usr/bin/env python3
2 # -*- coding: utf-8 -*-
3 
4 
11 
12 # -----------------------------------------------------------------------------------
13 #
14 # Example of GDL trigger DQM Module
15 #
16 # usage : %> basf2 trggdlDQM.py [input sroot file name]
17 #
18 # -----------------------------------------------------------------------------------
19 
20 import basf2 as b2
21 
22 import sys # get argv
23 import re
24 import os.path
25 argvs = sys.argv # get arg
26 argc = len(argvs) # of arg
27 
28 b2.set_log_level(b2.LogLevel.DEBUG)
29 
30 b2.use_central_database("TRGGDL_201811")
31 
32 main = b2.create_path()
33 
34 if argc == 2 and argvs[1][-6:] == ".sroot":
35  f_in_root = argvs[1]
36  input = b2.register_module('SeqRootInput')
37  matchobj = re.search("([^\\/]+)\\.sroot", f_in_root)
38  basename = re.sub('\\.sroot$', '', matchobj.group())
39  input.param('inputFileName', f_in_root)
40 elif argc == 2 and argvs[1][-5:] == ".root":
41  f_in_root = argvs[1]
42  input = b2.register_module('RootInput')
43  matchobj = re.search("([^\\/]+)\\.root", f_in_root)
44  basename = re.sub('\\.root$', '', matchobj.group())
45  input.param('inputFileName', f_in_root)
46 elif argc == 1:
47  input = b2.register_module('RootInput')
48  input.param('inputFileName', '/home/belle/nkzw/e3.4S/r034*/all/raw/sub00/raw.physics.hlt_hadron.0003.*.root')
49  basename = "e3.4S.r034"
50 else:
51  sys.exit("trggdlDQM.py> # of arg is strange. Exit.")
52 
53 main.add_module(input)
54 histo = b2.register_module('HistoManager')
55 histo.param("histoFileName", "dqm.%s.root" % basename)
56 
57 # Unpacker
58 trggdlUnpacker = b2.register_module("TRGGDLUnpacker")
59 main.add_module(trggdlUnpacker)
60 main.add_module(histo)
61 
62 # DQM
63 # trggdldqm = register_module('TRGGDLDQM', logLevel=LogLevel.DEBUG, debugLevel=20)
64 trggdldqm = b2.register_module('TRGGDLDQM')
65 # event by event bit-vs-clock TH2I hist for itd, ftdl, psnm in ROOT file.
66 trggdldqm.param('eventByEventTimingHistRecord', False)
67 # bit name on BinLabel for hGDL_itd,ftd,psn.
68 trggdldqm.param('bitNameOnBinLabel', True)
69 # generate postscript file that includes rising and falling edge distribution
70 trggdldqm.param('generatePostscript', False)
71 # postscript file name
72 psname = "dqm.%s.ps" % basename
73 trggdldqm.param('postScriptName', psname)
74 
75 # dump vcd file
76 dumpVcdFileTrue = False
77 trggdldqm.param('dumpVcdFile', dumpVcdFileTrue)
78 if dumpVcdFileTrue:
79  if not os.path.isdir('vcd'):
80  os.mkdir('vcd')
81  trggdldqm.param('bitConditionToDumpVcd', 'HIE ECL_BHA')
82  # '+' means logical OR. '!' is logical NOT.
83  # Bit names is delimited by space. No space after '!'.
84  # Parenthesis, A (B+!C) not allowed. Must be expanded to 'A B+A !C'.
85  # If one of characters is capital, the bit is regarded as psnm bit,
86  # otherwise ftdl bit: 'hie' is ftdl hie bit. 'hIE' is psnm hie bit.
87  trggdldqm.param('vcdEventStart', 0)
88  trggdldqm.param('vcdNumberOfEvents', 10)
89 
90 main.add_module(trggdldqm)
91 
92 progress = b2.register_module('Progress')
93 main.add_module(progress)
94 
95 b2.process(main)
96 
97 print(b2.statistics)