Belle II Software  release-05-01-25
SignalBundle.cc
1 //-----------------------------------------------------------------------------
2 // $Id$
3 //-----------------------------------------------------------------------------
4 // Filename : TRGSignalBundle.cc
5 // Section : TRG
6 // Owner : Yoshihito Iwasaki
7 // Email : yoshihito.iwasaki@kek.jp
8 //-----------------------------------------------------------------------------
9 // Description : A class to represent a bundle of SignalVectors.
10 //-----------------------------------------------------------------------------
11 // $Log$
12 //-----------------------------------------------------------------------------
13 
14 #define TRG_SHORT_NAMES
15 
16 #include <string>
17 #include <algorithm>
18 #include <limits>
19 #include <iostream>
20 #include <fstream>
21 #include "trg/trg/Utilities.h"
22 #include "trg/trg/Debug.h"
23 #include "trg/trg/Clock.h"
24 #include "trg/trg/Signal.h"
25 #include "trg/trg/SignalVector.h"
26 #include "trg/trg/SignalBundle.h"
27 #include "trg/trg/State.h"
28 
29 using namespace std;
30 
31 namespace Belle2 {
37  TRGSignalBundle::TRGSignalBundle(const TRGClock& c)
38  : _name("unknown"),
39  _clock(& c)
40  {
41  }
42 
43  TRGSignalBundle::TRGSignalBundle(const string& name, const TRGClock& c)
44  : _name(name),
45  _clock(& c)
46  {
47  }
48 
50  const TRGClock& c,
51  const TRGSignalBundle& input,
52  const unsigned outputBitSize,
53  TRGState(* packer)(const TRGState&))
54  : _name(name),
55  _clock(& c)
56  {
57 
58  //...Get state information...
59  const vector<int> states = input.stateChanges();
60  const unsigned nStates = states.size();
61 
62  //...Loop over all states...
63  vector<TRGState*> outputStates;
64  for (unsigned i = 0; i < nStates; i++) {
65  TRGState s = input.state(states[i]);
66 
67  // if (TRGDebug::level()) {
68  // cout << TRGDebug::tab() << "Clock=" << states[i] << endl;
69  // }
70 
71  outputStates.push_back(new TRGState((* packer)(s)));
72  }
73 
74  //...Bit size of output...
75  // unsigned outputSize = 0;
76  // if (outputStates.size())
77  // outputSize = outputStates.back()->size();
78 
79  //...Creat a SignalVector...
80  TRGSignalVector* sb = new TRGSignalVector(_name, c, outputBitSize);
81 
82  //...Make a SignalVector...
83  // const TRGState &os0 = * outputStates[0];
84  // sb->set(os0, 0); delete &os0;
85  // const unsigned n = outputStates.size(); // same as nStates
86 
87  for (unsigned i = 0; i < nStates; i++) {
88  const TRGState* s = outputStates[i];
89  sb->set((*s), states[i]);
90  delete s;
91  }
92 
93  push_back(sb);
94  }
95 
96  TRGSignalBundle::TRGSignalBundle(const string& name,
97  const TRGClock& c,
98  const TRGSignalBundle& input,
99  const unsigned outputBitSize,
100  const unsigned registerBitSize,
101  TRGState(* packer)(const TRGState&,
102  TRGState&,
103  bool&))
104  : _name(name),
105  _clock(& c)
106  {
107 
108  const string sn = "TRGSignalBundle constructor(4)";
110 
111  //...Get state information...
112  const vector<int> states = input.stateChanges();
113  const unsigned nStates = states.size();
114 
115  if (TRGDebug::level()) {
116  cout << TRGDebug::tab() << "#states=" << nStates << endl;
117  for (unsigned i = 0; i < nStates; i++)
118  cout << TRGDebug::tab() << i << " : " << states[i] << endl;
119  }
120 
121  //...Input is stably inactive...
122  if (nStates == 0) {
123  TRGSignalVector* sb = new TRGSignalVector(_name, c, outputBitSize);
124  push_back(sb);
126  return;
127  }
128 
129  //...Loop over all states...
130  vector<TRGState*> outputStates;
131  vector<int> newStates;
132  int lastClock = states[0] - 1;
133  TRGState* r = new TRGState(registerBitSize);
134  for (unsigned i = 0; i < nStates; i++) {
135 
136  if (TRGDebug::level())
137  cout << TRGDebug::tab() << "Last clock=" << lastClock << endl;
138 
139  //...Check clock position...
140  if (states[i] <= lastClock)
141  continue;
142 
143  if (TRGDebug::level()) {
144  cout << TRGDebug::tab() << "state=" << i << endl;
145  r->dump("", TRGDebug::tab() + "reg=");
146  }
147 
148  bool active = true;
149  int nLoops = 0;
150  while (active) {
151  int clk = states[i] + nLoops;
152  lastClock = clk;
153 
154  TRGState s = input.state(clk);
155  outputStates.push_back(new TRGState((* packer)(s, * r, active)));
156  newStates.push_back(clk);
157  ++nLoops;
158 
159  if (TRGDebug::level()) {
160  cout << TRGDebug::tab() << "state=" << i << ",clock=" << clk <<
161  ",LogicActive=" << active << endl;
162  r->dump("", TRGDebug::tab() + "reg=");
163  }
164  }
165  }
166  delete r;
167 
168  //...Size of output...
169  // unsigned outputSize = 0;
170  // if (outputStates.size())
171  // outputSize = outputStates.back()->size();
172 
173  //...Creat a SignalVector...
174  TRGSignalVector* sb = new TRGSignalVector(_name, c, outputBitSize);
175 
176  //...Make a SignalVector...
177  // const TRGState &os0 = * outputStates[0];
178  // sb->set(os0, 0); delete &os0;
179  // const unsigned n = outputStates.size(); // same as nStates
180 
181  const unsigned n = outputStates.size();
182  for (unsigned i = 0; i < n; i++) {
183  const TRGState* s = outputStates[i];
184  sb->set((* s), newStates[i]);
185  delete s;
186  }
187 
188  push_back(sb);
189 
191  }
192 
194  {
195  }
196 
197  void
198  TRGSignalBundle::dump(const string& msg,
199  const string& pre) const
200  {
201  cout << pre << _name << ":" << size() << " signal vector(s)" << endl;
202  for (unsigned i = 0; i < size(); i++)
203  (* this)[i]->dump(msg, " " + pre);
204  }
205 
206  bool
208  {
209  for (unsigned i = 0; i < size(); i++)
210  if ((* this)[i]->active())
211  return true;
212  return false;
213  }
214 
215  std::vector<int>
217  {
218 
219  //...List for clock positions...
220  std::vector<int> list;
221 
222  //...Pick up all clock points with state changes...
223  const unsigned n = size();
224  for (unsigned i = 0; i < n; i++) {
225  vector<int> a = (* this)[i]->stateChanges();
226  for (unsigned j = 0; j < a.size(); j++)
227  list.push_back(a[j]);
228  }
229 
230  //...Append the first clock point if there are state changes...
231  if (list.size())
232  list.push_back(_clock->min());
233 
234  //...Sorting...
235  std::sort(list.begin(), list.end());
236 
237  //...Remove duplicated clock...
238  std::vector<int> list2;
239  int last = numeric_limits<int>::min();
240  for (unsigned i = 0; i < list.size(); i++) {
241  const int j = list[i];
242  if (j != last) {
243  list2.push_back(j);
244  last = j;
245  }
246  }
247  return list2;
248  }
249 
250  TRGState
251  TRGSignalBundle::state(int clockPosition) const
252  {
253  TRGState s;
254  const unsigned n = size();
255  for (unsigned i = 0; i < n; i++) {
256  TRGState t = (* this)[i]->state(clockPosition);
257  s += t;
258  }
259  return s;
260  }
261 
262  const TRGClock&
264  {
265  _clock = & c;
266 
267  for (unsigned i = 0; i < size(); i++) {
268  TRGSignalVector& t = * (* this)[i];
269  t.clock(c);
270  }
271 
272  return * _clock;
273  }
274 
275  TRGSignal
277  {
278 
279  //...Get state information...
280  const vector<int> states = stateChanges();
281  const unsigned nStates = states.size();
282 
283  //...Output...
284  TRGSignal ored;
285 
286  //...Loop over all states...
287  // vector<TRGState *> outputStates;
288  for (unsigned i = 0; i < nStates; i++) {
289  // if (TRGDebug::level())
290  // cout << TRGDebug::tab() << "Clock=" << states[i] << endl;
291 
292  // if (active(states[i])) {
293  // TRGSignal p(* _clock,
294 
295  // }
296 
297 
298  cout << "TRGSginalBundle::ored !!! not completed yet" << endl;
299  }
300 
301  return TRGSignal();
302  }
303 
304  void
305  TRGSignalBundle::dumpCOE(const string& fnIn, int start , int stop) const
306  {
307 
308  string fn = fnIn;
309 
310  if (fnIn.size() == 0)
311  fn = name();
312 
313  //...Open a file to output...
314  ofstream file(fn + ".coe", ios::out);
315  if (! file.is_open()) {
316  cout << "!!! " << name() << " can not open file : " << fn << endl;
317  return;
318  }
319 
320  // //...Determine start clock to output...
321  // int clk0 = _clock->max();
322  // vector<int> sc = stateChanges();
323  // for (unsigned i = 0; i < sc.size(); i++) {
324  // if (state(sc[i]).active()) {
325  // clk0 = sc[i];
326  // break;
327  // }
328  // }
329 
330  // //...Determine end clock to output...
331  // int clk1 = _clock->min();
332  // for (unsigned i = 0; i < sc.size(); i++) {
333  // if (sc[i] < clk0)
334  // continue;
335 
336  // if (state(sc[i]).active()) {
337  // clk1 = sc[i];
338  // }
339  // }
340 
341  // //...No active case...
342  // if (clk0 > clk1) {
343  // clk0 = 0;
344  // clk1 = 1;
345  // }
346 
347  // if (TRGDebug::level()) {
348  // cout << TRGDebug::tab() << "SignalBundle::dumpCOE : " << name()
349  // << endl;
350  // cout << TRGDebug::tab() << " clock region to output" << endl;
351  // cout << TRGDebug::tab() << " start=" << clk0 << endl;
352  // cout << TRGDebug::tab() << " end =" << clk1 << endl;
353  // }
354 
355  // //...32 clocks as default : 2016/04...
356  // clk0 = 0;
357  // clk1 = 31;
358 
359  int clk0 = start;
360  int clk1 = stop;
361 
362  TRGState tmp = state(0);
363  const TRGSignalVector& cc = _clock->clockCounter();
364 
365  file << "; " << name() << endl;
366  file << "; generated at " << TRGUtil::dateString() << endl;
367  file << "; start clock = " << clk0 << endl;
368  file << "; end clock = " << clk1 << endl;
369  file << "; bit size = " << tmp.size() << " + clock counter(" << cc.size()
370  << ")" << endl;
371  file << ";" << endl;
372  file << "memory_initialization_radix=2;" << endl;
373  file << "memory_initialization_vector=" << endl;
374 
375  for (int i = clk0; i <= clk1; i++) {
376  TRGState sd = state(i);
377  TRGState sc = cc.state(i);
378  file << sc;
379  file << sd;
380  if (i == clk1)
381  file << ";" << endl;
382  else
383  file << "," << endl;
384  }
385 
386  file.close();
387 
388  }
389 
391 } // namespace Belle2
Belle2::TRGSignalBundle::dumpCOE
void dumpCOE(const std::string &fileName="", int start=0, int stop=0) const
makes coe output.
Definition: SignalBundle.cc:305
Belle2::TRGSignal
A class to represent a digitized signal. Unit is nano second.
Definition: Signal.h:28
Belle2::TRGSignalBundle::stateChanges
std::vector< int > stateChanges(void) const
returns a list of clock position of state change.
Definition: SignalBundle.cc:216
Belle2::TRGDebug::level
static int level(void)
returns the debug level.
Definition: Debug.cc:72
Belle2::TRGClock::clockCounter
const TRGSignalVector & clockCounter(void) const
returns the clock counter.
Definition: Clock.cc:171
Belle2::TRGState
A class to represent a state of multi bits.
Definition: State.h:29
Belle2::TRGClock::min
int min(void) const
returns min. clock point.
Definition: Clock.h:199
Belle2::TRGSignalBundle
A class to represent a bundle of SignalVectors.
Definition: SignalBundle.h:31
Belle2::TRGSignalBundle::name
const std::string & name(void) const
returns name.
Definition: SignalBundle.h:118
Belle2::TRGSignalBundle::active
bool active(void) const
returns true if there is a signal.
Definition: SignalBundle.cc:207
Belle2::TRGSignalBundle::dump
void dump(const std::string &message="", const std::string &pre="") const
dumps contents.
Definition: SignalBundle.cc:198
Belle2::TRGSignalBundle::clock
const TRGClock & clock(void) const
returns clock.
Definition: SignalBundle.h:132
Belle2
Abstract base class for different kinds of events.
Definition: MillepedeAlgorithm.h:19
Belle2::TRGSignalBundle::~TRGSignalBundle
virtual ~TRGSignalBundle()
Destructor.
Definition: SignalBundle.cc:193
Belle2::TRGSignalBundle::_name
std::string _name
Name.
Definition: SignalBundle.h:108
Belle2::TRGSignalBundle::ored
TRGSignal ored(void) const
returns signal of all ORed.
Definition: SignalBundle.cc:276
Belle2::TRGDebug::tab
static std::string tab(void)
returns tab spaces.
Definition: Debug.cc:52
Belle2::TRGSignalBundle::TRGSignalBundle
TRGSignalBundle(const TRGClock &)
Default constructor.
Definition: SignalBundle.cc:37
Belle2::TRGSignalBundle::state
TRGState state(int clockPosition) const
returns state at given clock position.
Definition: SignalBundle.cc:251
Belle2::TRGDebug::leaveStage
static void leaveStage(const std::string &stageName)
Declare that you leave a stage.
Definition: Debug.cc:39
Belle2::TRGDebug::enterStage
static void enterStage(const std::string &stageName)
Declare that you enter new stage.
Definition: Debug.cc:29
Belle2::TRGClock
A class to represent a digitized signal. Unit is nano second.
Definition: Clock.h:43
Belle2::TRGSignalVector
A class to represent a bundle of digitized signals.
Definition: SignalVector.h:31
Belle2::TRGSignalVector::set
const TRGSignalVector & set(const TRGState &, int clockPosition)
sets state at given clock.
Definition: SignalVector.cc:186
Belle2::TRGSignalBundle::_clock
const TRGClock * _clock
Clock.
Definition: SignalBundle.h:111