Belle II Software  release-05-01-25
TRGCDCTrackSegmentSimulator.cc
1 //-----------------------------------------------------------------------------
2 // $Id$
3 //-----------------------------------------------------------------------------
4 // Filename : TRGCDCTrackSegmentSimulator.cc
5 // Section : TRG CDC
6 // Owner : Yoshihito Iwasaki
7 // Email : yoshihito.iwasaki@kek.jp
8 //-----------------------------------------------------------------------------
9 // Description : A program to display TRGCDC components
10 //-----------------------------------------------------------------------------
11 // $Log$
12 //-----------------------------------------------------------------------------
13 
14 #define TRG_SHORT_NAMES
15 #define TRGCDC_SHORT_NAMES
16 
17 #define DEBUG_LEVEL 1
18 #define PROGRAM_NAME "TRGCDCTrackSegmentSimulator"
19 #define PROGRAM_VERSION "version 0.00"
20 #define ENV_PATH "BELLE2_LOCAL_DIR"
21 //#define CONFIG "TRGCDCWireConfig_0_20101110_0836.dat"
22 #define CONFIG "TRGCDCConfig_0_20101111_1051_2013beamtest.dat"
23 
24 #include <iostream>
25 #include <fstream>
26 #include <string>
27 #include "trg/trg/Debug.h"
28 #include "trg/trg/Utilities.h"
29 #include "trg/trg/State.h"
30 #include "trg/trg/Channel.h"
31 #include "trg/cdc/TRGCDC.h"
32 #include "trg/cdc/Wire.h"
33 #include "trg/cdc/Segment.h"
34 #include "trg/cdc/TrackSegmentFinder.h"
35 #include "framework/gearbox/Gearbox.h"
36 
37 #ifdef TRGCDC_DISPLAY
38 #include "trg/cdc/DisplayRphi.h"
39 #include "trg/cdc/DisplayHough.h"
40 namespace Belle2_TRGCDC {
41  Belle2::TRGCDCDisplayRphi* D = 0;
42 }
43 #endif
44 
45 using namespace std;
46 using namespace Belle2;
47 #ifdef TRGCDC_DISPLAY
48 using namespace Belle2_TRGCDC;
49 #endif
50 
51 void readFile(const string& filename,
52  TRGSignalBundle& isb,
53  TRGSignalBundle& osbe,
54  TRGSignalBundle& osbt);
55 
56 int
57 main(int argc, char* argv[])
58 {
59 
60  cout << PROGRAM_NAME << " ... " << PROGRAM_VERSION << endl;
61  // const string tab = " ";
62 
63  //...Arguments...
64  if (argc < 3) {
65  cout << PROGRAM_NAME << " needs 3 arguments" << endl;
66  return -1;
67  }
68  const unsigned dl = stoi(string(argv[1]));
69  const unsigned sl = stoi(string(argv[2]));
70  const string fn = string(argv[3]);
71 
72  TRGDebug::level(dl);
73 
74  //...Gearbox...
75  const string path = getenv(ENV_PATH);
76  const string patht = path + "/data/trg/cdc/";
77  vector<std::string> backends;
78  backends.push_back("file:");
79  string filename = "geometry/Belle2.xml";
80  Gearbox& gearbox = Gearbox::getInstance();
81  gearbox.setBackends(backends);
82  gearbox.open(filename);
83 
84  //...TRGCDC parameters...
85  const string configFile = patht + CONFIG;
86  const unsigned simulationMode = 3; // fast and firm
87  const unsigned fastSimulationMode = 0;
88  const unsigned firmwareSimulationMode = 0;
89  const int firmwareSimulationStart = 0;
90  const int firmwareSimulationStop = 32 * 32 - 1;
91  const unsigned makeRootFile = 0;
92  const bool perfect2DFinder = false;
93  const bool perfect3DFinder = false;
94  const string innerTSLUTFile = patht + "innerLUT_v2.2.coe";
95  const string outerTSLUTFile = patht + "outerLUT_v2.2.coe";
96  const string rootTRGCDCFile = "TRGCDC.root";
97  const string rootFitter3DFile = "Fitter3D.root";
98  const unsigned houghFinderPeakMin = 5;
99  const string houghMappingFilePlus = patht + "HoughMappingPlus20140807.dat";
100  const string houghMappingFileMinus = patht +
101  "HoughMappingMinus20140808.dat";
102  const unsigned houghDoit = 2;
103  const unsigned fLogicLUTTSF = 0;
104  const unsigned fLRLUT = 1;
105  const unsigned fevtTime = 1;
106  const unsigned fmclr = 0;
107  const double inefficiency = 0;
108  const unsigned fileTSF = 0;
109  const unsigned fileETF = 0;
110  const unsigned fverETF = 0;
111  const unsigned fprintFirmETF = 0;
112  const unsigned fileHough3D = 0;
113  const unsigned finder3DMode = 2;
114  const unsigned fileFitter3D = 0;
115  const unsigned trgCDCDataInputMode = 0;
116 
117  //...TRGCDC...
118  TRGCDC* cdc = TRGCDC::getTRGCDC(configFile,
119  simulationMode,
120  fastSimulationMode,
121  firmwareSimulationMode,
122  firmwareSimulationStart,
123  firmwareSimulationStop,
124  makeRootFile,
125  perfect2DFinder,
126  perfect3DFinder,
127  innerTSLUTFile,
128  outerTSLUTFile,
129  rootTRGCDCFile,
130  rootFitter3DFile,
131  houghFinderPeakMin,
132  houghMappingFilePlus,
133  houghMappingFileMinus,
134  houghDoit,
135  fLogicLUTTSF,
136  fLRLUT,
137  fevtTime,
138  fmclr,
139  inefficiency,
140  fileTSF,
141  fileETF,
142  fverETF,
143  fprintFirmETF,
144  fileHough3D,
145  finder3DMode,
146  fileFitter3D,
147  trgCDCDataInputMode);
148 
149  //...TSF board...
150  TRGCDCTrackSegmentFinder& tsfb = * cdc->tsfboard(sl);
151 
152  //...Read input signal bundle...
153  const TRGClock& dc = TRGCDC::getTRGCDC()->dataClock();
154  TRGSignalBundle isb("mgr data from chipscope", dc);;
155  TRGSignalBundle osbt("output for trk form chipscope", dc);;
156  TRGSignalBundle osbe("output for evt from chipscope", dc);;
157  readFile(fn, isb, osbe, osbt);
158 
159  //...Set input signal bundle...
160  const_cast<TRGChannel*>(tsfb.input(0))->signal(& isb);
161  TRGSignalVector dummy("mgr dummy data", dc, isb[0]->size());
162  TRGSignalBundle isbd("mgr dummy data", dc);;
163  isbd.push_back(& dummy);
164  for (unsigned i = 1; i < tsfb.nInput(); i++)
165  const_cast<TRGChannel*>(tsfb.input(i))->signal(& isbd);
166 
167  //...Get output signal bundle...
168  tsfb.simulate2();
169  TRGSignalBundle& osb = * tsfb.output(0)->signal();
170 
171  //...Compare output...
172  osb.dump();
173  osbt.dump();
174 
175 #ifdef TRGCDC_DISPLAY
176  //...Display...
177  D->clear();
178  D->show();
179 #endif
180 
181  //...Termination...
182  cout << PROGRAM_NAME << " ... terminated" << endl;
183 }
184 
185 void
186 readFile(const string& fn,
187  TRGSignalBundle& isb,
188  TRGSignalBundle& osbe,
189  TRGSignalBundle& osbt)
190 {
191 
192  //...Open input file...
193  ifstream ifile(fn.c_str(), ios::in);
194  if (ifile.fail()) {
195  cout << PROGRAM_NAME << " !!! can not open file" << endl
196  << " " << fn << endl;
197  exit(-1);
198  }
199 
200  //...Preparations...
201  const TRGClock& dc = TRGCDC::getTRGCDC()->dataClock();
202  const unsigned eSize = 625;
203  const unsigned tSize = 1054 - 625;
204  const unsigned mSize = 1309 - 1053 - 9;
205  TRGSignalVector* eOut = new TRGSignalVector("output for evt", dc, eSize);
206  TRGSignalVector* tOut = new TRGSignalVector("output for trk", dc, tSize);
207  TRGSignalVector* mIn = new TRGSignalVector("input from mgr", dc, mSize);
208 
209  //...Read data...
210  char b[10000];
211  while (! ifile.eof()) {
212  ifile.getline(b, 10000);
213  string l(b);
214 
215  if (l.size() == 0) continue;
216  if (b[0] == '#') continue;
217  if (b[0] == 'S') continue;
218 
219  // string clock = TRGUtil::carstring(l);
220  l = TRGUtil::cdrstring(l);
221  // const string g = TRGUtil::carstring(l);
222  l = TRGUtil::cdrstring(l);
223  const string dat = TRGUtil::carstring(l);
224  l = TRGUtil::cdrstring(l);
225 
226  //...Divide data...
227  TRGState a(dat.c_str(), 0);
228  TRGState e = a.subset(0, eSize);
229  TRGState t = a.subset(eSize, tSize);
230  TRGState m = a.subset(1054, mSize);
231  TRGState c = a.subset(1054 + mSize, 9);
232  unsigned cMgr = unsigned(c);
233 
234  eOut->set(e, cMgr);
235  tOut->set(t, cMgr);
236  mIn->set(m, cMgr);
237 
238  // cout << "clock=" << clock << ",dat:size=" << a.size() << ",e:size="
239  // << e.size() << ",t:size=" << t.size() << ",m:size=" << m.size()
240  // << endl;
241  }
242 
243  isb.push_back(mIn);
244  osbe.push_back(eOut);
245  osbt.push_back(tOut);
246 }
prepareAsicCrosstalkSimDB.e
e
aux.
Definition: prepareAsicCrosstalkSimDB.py:53
Belle2::TRGChannel
A class to represent a serial link between trigger hardware modules.
Definition: Channel.h:30
Belle2::TRGState
A class to represent a state of multi bits.
Definition: State.h:29
Belle2::TRGSignalBundle
A class to represent a bundle of SignalVectors.
Definition: SignalBundle.h:31
Belle2::TRGSignalBundle::dump
void dump(const std::string &message="", const std::string &pre="") const
dumps contents.
Definition: SignalBundle.cc:198
Belle2::TRGChannel::signal
TRGSignalBundle * signal(void) const
returns signal.
Definition: Channel.h:99
Belle2::TRGBoard::output
TRGChannel * output(unsigned i) const
returns output channel i.
Definition: Board.h:170
main
int main(int argc, char **argv)
Run all tests.
Definition: test_main.cc:77
Belle2::TRGCDCTrackSegmentFinder
a class of TrackSegmentFinder in TRGCDC
Definition: TrackSegmentFinder.h:41
Belle2
Abstract base class for different kinds of events.
Definition: MillepedeAlgorithm.h:19
Belle2::Gearbox
Singleton class responsible for loading detector parameters from an XML file.
Definition: Gearbox.h:44
Belle2::TRGCDC
The instance of TRGCDC is a singleton.
Definition: TRGCDC.h:70
Belle2::TRGCDCTrackSegmentFinder::simulate2
void simulate2(void)
Firmware simulation. Unified version of inner and outer : yi.
Definition: TrackSegmentFinder.cc:2180
Belle2::TRGBoard::nInput
unsigned nInput(void) const
returns input channels.
Definition: Board.h:177
alignment.constraints_generator.filename
filename
File name.
Definition: constraints_generator.py:224
Belle2::TRGClock
A class to represent a digitized signal. Unit is nano second.
Definition: Clock.h:43
Belle2::TRGSignalVector
A class to represent a bundle of digitized signals.
Definition: SignalVector.h:31
Belle2::TRGBoard::input
const TRGChannel * input(unsigned i) const
returns input channel i.
Definition: Board.h:163
Belle2::TRGSignalVector::set
const TRGSignalVector & set(const TRGState &, int clockPosition)
sets state at given clock.
Definition: SignalVector.cc:186