16 #include <ecl/modules/eclDQMExtended/eclDQMExtended.h>
19 #include <framework/core/HistoModule.h>
20 #include <framework/datastore/StoreArray.h>
21 #include <framework/logging/Logger.h>
24 #include <ecl/utility/ECLDspUtilities.h>
25 #include <ecl/utility/ECLDspEmulator.h>
37 #include <TDirectory.h>
40 #include <boost/filesystem.hpp>
41 #include <boost/format.hpp>
60 m_ECLDspDataArray0("ECLDSPPars0"),
61 m_ECLDspDataArray1("ECLDSPPars1"),
62 m_ECLDspDataArray2("ECLDSPPars2"),
63 m_calibrationThrA0("ECL_FPGA_LowAmp"),
64 m_calibrationThrAhard("ECL_FPGA_HitThresh"),
65 m_calibrationThrAskip("ECL_FPGA_StoreDigit")
70 setDescription(
"ECL Data Quality Monitor. Logic Test");
71 setPropertyFlags(c_ParallelProcessingCertified);
72 addParam(
"histogramDirectoryName", m_histogramDirectoryName,
73 "histogram directory in ROOT file", std::string(
"ECL"));
74 addParam(
"InitKey", m_InitKey,
75 "How to initialize DSP coeffs: ''DB'' or ''File'' are acceptable ", std::string(
"DB"));
76 addParam(
"DSPDirectoryName", m_DSPDirectoryName,
77 "directory for DSP coeffs", std::string(
"/hsm/belle2/bdata/users/dmitry/dsp/"));
78 addParam(
"RunName", m_RunName,
79 "Name of run with DSP files", std::string(
"run0000/"));
80 addParam(
"SaveDetailedFitData", m_SaveDetailedFitData,
"Save detailed data "
81 "(ampdiff_{cellid,shaper}, timediff_{cellid,shaper} histograms) for "
82 "failed fits.",
false);
83 addParam(
"AdjustedTiming", m_adjusted_timing,
"Use improved procedure for "
84 "time determination in ShaperDSP emulator",
true);
86 std::vector<int> default_skip = {
88 TRGSummary::ETimingType::TTYP_DPHY,
89 TRGSummary::ETimingType::TTYP_RAND,
90 TRGSummary::ETimingType::TTYP_POIS,
92 addParam(
"skipEvents", m_skipEvents,
"Skip events that have listed timing "
93 "source (from TRGSummary)", default_skip);
106 TDirectory* oldDir = gDirectory;
110 TDirectory* dirDAQ =
dynamic_cast<TDirectory*
>(oldDir->Get(m_histogramDirectoryName.c_str()));
111 if (!dirDAQ) dirDAQ = oldDir->mkdir(m_histogramDirectoryName.c_str());
116 std::vector<TH1F*> h_amp_qualityfail_raw, h_time_qualityfail_raw;
118 for (
int i = 0; i < 4; i++) {
119 std::string h_name_a, h_title_a, h_name_t, h_title_t;
120 h_name_a = str(boost::format(
"amp_timefail_q%1%") % i);
121 h_title_a = str(boost::format(
"Amp for time mismatches w/ FPGA fit qual=%1%") % i);
122 h_name_t = str(boost::format(
"time_ampfail_q%1%") % i);
123 h_title_t = str(boost::format(
"Time for amp mismatches w/ FPGA fit qual=%1%") % i);
124 TH1F* h_a =
new TH1F(h_name_a.c_str(), h_title_a.c_str(), 1200, 0, 262144);
125 TH1F* h_t =
new TH1F(h_name_t.c_str(), h_title_t.c_str(), 240, -2050, 2050);
126 h_a->SetOption(
"LIVE");
127 h_t->SetOption(
"LIVE");
128 h_amp_timefail.push_back(h_a);
129 h_time_ampfail.push_back(h_t);
132 for (
int i = 0; i < 4; i++) {
133 for (
int j = 0; j < 4; j++) {
135 std::string h_name_a, h_title_a, h_name_t, h_title_t;
136 h_name_a = str(boost::format(
"amp_qf%1%_qd%2%") % i % j);
137 h_title_a = str(boost::format(
"Amp for C++ fit qual=%1% and FPGA fit qual=%2%") % i % j);
138 h_name_t = str(boost::format(
"time_qf%1%_qd%2%") % i % j);
139 h_title_t = str(boost::format(
"Time for C++ fit qual=%1% and FPGA fit qual=%2%") % i % j);
140 TH1F* h_a =
new TH1F(h_name_a.c_str(), h_title_a.c_str(), 1200, 0, 262144);
141 TH1F* h_t =
new TH1F(h_name_t.c_str(), h_title_t.c_str(), 240, -2050, 2050);
142 h_a->SetOption(
"LIVE");
143 h_t->SetOption(
"LIVE");
144 h_amp_qualityfail_raw.push_back(h_a);
145 h_time_qualityfail_raw.push_back(h_t);
148 h_amp_qualityfail.push_back(h_amp_qualityfail_raw);
149 h_time_qualityfail.push_back(h_time_qualityfail_raw);
150 h_amp_qualityfail_raw.clear();
151 h_time_qualityfail_raw.clear();
154 h_ampfail_quality =
new TH1F(
"ampfail_quality",
"Number of FPGA <-> C++ fitter #bf{amp} inconsistencies vs fit qual", 5, -1, 4);
155 h_ampfail_quality->SetFillColor(kPink - 4);
156 h_ampfail_quality->GetXaxis()->SetTitle(
"FPGA fit qual. -1-all evts,0-good,1-int overflow,2-low amp,3-bad chi2");
157 h_ampfail_quality->SetDrawOption(
"hist");
158 h_ampfail_quality->SetOption(
"LIVE");
160 h_timefail_quality =
new TH1F(
"timefail_quality",
"Number of FPGA <-> C++ fitter #bf{time} inconsistencies vs fit qual", 5, -1, 4);
161 h_timefail_quality->SetFillColor(kPink - 4);
162 h_timefail_quality->GetXaxis()->SetTitle(
"FPGA fit qual. -1-all evts,0-good,1-int overflow,2-low amp,3-bad chi2");
164 h_ampfail_cellid =
new TH1F(
"ampfail_cellid",
"Cell IDs w/ amp inconsistencies", 8736, 1, 8737);
165 h_ampfail_cellid->GetXaxis()->SetTitle(
"Cell ID");
166 h_ampfail_cellid->SetOption(
"LIVE");
168 h_timefail_cellid =
new TH1F(
"timefail_cellid",
"Cell IDs w/ time inconsistencies", 8736, 1, 8737);
169 h_timefail_cellid->GetXaxis()->SetTitle(
"Cell ID");
170 h_timefail_cellid->SetOption(
"LIVE");
172 h_amptimefail_cellid =
new TH1F(
"amptimefail_cellid",
"Cell IDs w/ time and amp inconsistencies", 8736, 1, 8737);
173 h_amptimefail_cellid->GetXaxis()->SetTitle(
"Cell ID");
174 h_amptimefail_cellid->SetOption(
"LIVE");
176 h_ampfail_shaperid =
new TH1F(
"ampfail_shaperid",
"Shaper IDs w/ amp inconsistencies", 624, 1, 625);
177 h_ampfail_shaperid->GetXaxis()->SetTitle(
"Shaper ID");
178 h_ampfail_shaperid->SetOption(
"LIVE");
180 h_timefail_shaperid =
new TH1F(
"timefail_shaperid",
"Shaper IDs w/ time inconsistencies", 624, 1, 625);
181 h_timefail_shaperid->GetXaxis()->SetTitle(
"Shaper ID");
182 h_timefail_shaperid->SetOption(
"LIVE");
184 h_amptimefail_shaperid =
new TH1F(
"amptimefail_shaperid",
"Shaper IDs w/ time and amp inconsistencies", 624, 1, 625);
185 h_amptimefail_shaperid->GetXaxis()->SetTitle(
"Shaper ID");
186 h_amptimefail_shaperid->SetOption(
"LIVE");
188 h_ampfail_crateid =
new TH1F(
"ampfail_crateid",
"Crate IDs w/ amp inconsistencies", 52, 1, 53);
189 h_ampfail_crateid->GetXaxis()->SetTitle(
"Crate ID (same as ECLCollector ID)");
190 h_ampfail_crateid->SetOption(
"LIVE");
192 h_timefail_crateid =
new TH1F(
"timefail_crateid",
"Crate IDs w/ time inconsistencies", 52, 1, 53);
193 h_timefail_crateid->GetXaxis()->SetTitle(
"Crate ID (same as ECLCollector ID)");
194 h_timefail_crateid->SetOption(
"LIVE");
196 h_amptimefail_crateid =
new TH1F(
"amptimefail_crateid",
"Crate IDs w/ time and amp inconsistencies", 52, 1, 53);
197 h_amptimefail_crateid->GetXaxis()->SetTitle(
"Crate ID (same as ECLCollector ID)");
198 h_amptimefail_crateid->SetOption(
"LIVE");
200 h_qualityfail_cellid =
new TH1F(
"qualityfail_cellid",
"Cell IDs w/ fit qual inconsistencies", 8736, 1, 8737);
201 h_qualityfail_cellid->GetXaxis()->SetTitle(
"Cell ID");
202 h_qualityfail_cellid->SetOption(
"LIVE");
204 h_qualityfail_shaperid =
new TH1F(
"qualityfail_shaperid",
"Shaper IDs w/ fit qual inconsistencies", 624, 1, 625);
205 h_qualityfail_shaperid->GetXaxis()->SetTitle(
"Shaper ID");
206 h_qualityfail_shaperid->SetOption(
"LIVE");
208 h_qualityfail_crateid =
new TH1F(
"qualityfail_crateid",
"Crate IDs w/ fit qual inconsistencies", 52, 1, 53);
209 h_qualityfail_crateid->GetXaxis()->SetTitle(
"Crate ID (same as ECLCollector ID)");
210 h_qualityfail_crateid->SetOption(
"LIVE");
212 h_fail_shaperid =
new TH1F(
"fail_shaperid",
"Shaper IDs w/ inconsistencies", 624, 1, 625);
213 h_fail_shaperid->GetXaxis()->SetTitle(
"Shaper ID");
214 h_fail_shaperid->SetOption(
"LIVE");
216 h_fail_crateid =
new TH1F(
"fail_crateid",
"Crate IDs w/ inconsistencies", 52, 1, 53);
217 h_fail_crateid->GetXaxis()->SetTitle(
"Crate ID (same as ECLCollector ID)");
218 h_fail_crateid->SetOption(
"LIVE");
223 if (m_SaveDetailedFitData) {
224 h_ampdiff_cellid =
new TH2F(
"ampdiff_cellid",
"Amp. diff. (Emulator-Data) for amp inconsistencies",
225 8736, 1, 8737, 239, -262143, 262143);
226 h_ampdiff_cellid->GetXaxis()->SetTitle(
"Cell ID");
227 h_ampdiff_cellid->GetYaxis()->SetTitle(
"Amplitude difference");
228 h_ampdiff_cellid->SetOption(
"LIVE");
230 h_timediff_cellid =
new TH2F(
"timediff_cellid",
"Time diff. (Emulator-Data) for time inconsistencies",
231 8736, 1, 8737, 239, -4095, 4095);
232 h_timediff_cellid->GetXaxis()->SetTitle(
"Cell ID");
233 h_timediff_cellid->GetYaxis()->SetTitle(
"Time difference");
234 h_timediff_cellid->SetOption(
"LIVE");
236 h_ampdiff_shaperid =
new TH2F(
"ampdiff_shaper",
"Amp. diff. (Emulator-Data) "
237 "for amp inconsistencies vs Shaper Id",
238 624, 1, 625, 239, -262143, 262143);
239 h_ampdiff_shaperid->GetXaxis()->SetTitle(
"Shaper Id");
240 h_ampdiff_shaperid->GetYaxis()->SetTitle(
"Amplitude difference");
241 h_ampdiff_shaperid->SetOption(
"LIVE");
243 h_timediff_shaperid =
new TH2F(
"timediff_shaper",
"Time diff. (Emulator-Data) "
244 "for time inconsistencies vs Shaper Id",
245 624, 1, 625, 239, -4095, 4095);
246 h_timediff_shaperid->GetXaxis()->SetTitle(
"Shaper Id");
247 h_timediff_shaperid->GetYaxis()->SetTitle(
"Time difference");
248 h_timediff_shaperid->SetOption(
"LIVE");
251 h_ampdiff_quality =
new TH2F(
"ampdiff_quality",
"Amp. diff. (Emulator-Data) for amp. inconsistencies", 4, 0, 4, 239,
253 h_ampdiff_quality->GetXaxis()->SetTitle(
"FPGA fit quality. 0-good, 1-int overflow, 2-low amp, 3-bad chi2");
254 h_ampdiff_quality->GetYaxis()->SetTitle(
"Amplitude difference");
255 h_ampdiff_quality->SetOption(
"LIVE");
257 h_timediff_quality =
new TH2F(
"timediff_quality",
"Time diff. (Emulator-Data) for time inconsistencies", 4, 0, 4, 239,
259 h_timediff_quality->GetXaxis()->SetTitle(
"FPGA fit quality. 0-good, 1-int overflow, 2-low amp, 3-bad chi2");
260 h_timediff_quality->GetYaxis()->SetTitle(
"Time difference");
261 h_timediff_quality->SetOption(
"LIVE");
263 h_quality_fit_data =
new TH2F(
"quality_fit_data",
"C++ fitter vs FPGA, fit quality inconsistencies", 4, 0, 4, 4, 0, 4);
264 h_quality_fit_data->GetXaxis()->SetTitle(
"C++ fit qual. 0-good,1-int overflow,2-low amp,3-bad chi2");
265 h_quality_fit_data->GetYaxis()->SetTitle(
"FPGA fit qual. 0-good,1-int overflow,2-low amp,3-bad chi2");
266 h_quality_fit_data->SetOption(
"LIVE");
268 h_ampflag_qualityfail =
new TH2F(
"ampflag_qualityfail",
"Amp flag (0/1) for fit qual inconsistencies", 4, 0, 4, 4, -1,
270 h_ampflag_qualityfail->GetXaxis()->SetTitle(
"FPGA fit quality. 0-good,1-int overflow,2-low amp,3-bad chi2");
271 h_ampflag_qualityfail->GetYaxis()->SetTitle(
"Amp flag (0-amp consistent)");
272 h_ampflag_qualityfail->SetOption(
"LIVE");
274 h_timeflag_qualityfail =
new TH2F(
"timeflag_qualityfail",
"Time flag (0/1) for fit qual inconsistencies", 4, 0, 4, 4,
276 h_timeflag_qualityfail->GetXaxis()->SetTitle(
"FPGA fit quality. 0-good,1-int overflow,2-low amp,3-bad chi2");
277 h_timeflag_qualityfail->GetYaxis()->SetTitle(
"Time flag (0-time consistent)");
278 h_timeflag_qualityfail->SetOption(
"LIVE");
288 m_ECLDigits.isRequired();
289 m_ECLTrigs.isOptional();
290 m_ECLDsps.isOptional();
292 if (!mapper.initFromDB()) B2FATAL(
"ECL DQM logic test FATAL:: Can't initialize eclChannelMapper");
294 if (m_InitKey ==
"DB") initDspfromDB();
295 else if (m_InitKey ==
"File") initDspfromFile();
296 else B2FATAL(
"ECL DQM logic test FATAL: No way to initialize DSP coeffs!!! Please choose InitKey = DB or InitKey = File");
301 const std::vector<float> intermediate = cal->getCalibVector();
302 constants.resize(intermediate.size());
303 for (
size_t i = 0; i < constants.size(); i++) constants[i] = (
short int)intermediate[i];
308 std::map<std::string, std::vector<short int>>& map1,
309 std::map<std::string, short int>& map2)
312 dspdata->
getF(map1[
"F"]);
313 dspdata->
getF1(map1[
"F1"]);
314 dspdata->
getF31(map1[
"F31"]);
315 dspdata->
getF32(map1[
"F32"]);
316 dspdata->
getF33(map1[
"F33"]);
317 dspdata->
getF41(map1[
"F41"]);
318 dspdata->
getF43(map1[
"F43"]);
320 map2[
"k_a"] = (
short int)dspdata->
getka();
321 map2[
"k_b"] = (
short int)dspdata->
getkb();
322 map2[
"k_c"] = (
short int)dspdata->
getkc();
324 map2[
"k_1"] = (
short int)dspdata->
getk1();
325 map2[
"k_2"] = (
short int)dspdata->
getk2();
332 int iCrate = mapper.getCrateID(cellID);
333 int iShaperPosition = mapper.getShaperPosition(cellID);
334 return (iCrate - 1) * 12 + iShaperPosition;
339 size_t size = vectorFrom.size();
340 if (size % 16) B2ERROR(
"ECL DQM logic test error: Split is impossible!" <<
LogVar(
"Vector size", size));
341 return (vectorFrom.data() + (size / 16) * (iChannel - 1));
349 callbackCalibration(m_calibrationThrA0, v_totalthrA0);
350 callbackCalibration(m_calibrationThrAhard, v_totalthrAhard);
351 callbackCalibration(m_calibrationThrAskip, v_totalthrAskip);
353 for (
const auto& dspdata : m_ECLDspDataArray0) {
355 callbackCalibration(&dspdata, map_container_vec[iShaper],
356 map_container_coef[iShaper]);
359 for (
const auto& dspdata : m_ECLDspDataArray1) {
361 callbackCalibration(&dspdata, map_container_vec[iShaper],
362 map_container_coef[iShaper]);
365 for (
const auto& dspdata : m_ECLDspDataArray2) {
368 if (iShaper - (iShaper - 1) / 12 * 12 > 10)
continue;
370 if (iShaper - (iShaper - 1) / 12 * 12 > 8)
continue;
372 callbackCalibration(&dspdata, map_container_vec[iShaper],
373 map_container_coef[iShaper]);
379 const boost::filesystem::path MainDir(m_DSPDirectoryName);
380 const boost::filesystem::path RunSubDir(m_RunName);
381 const std::regex
Filter(
".*(crate)([0-9]{2})/.*(dsp)([0-9]{2})(.dat)");
382 if (!exists(MainDir / RunSubDir)) B2FATAL(
"ECL DQM logic test FATAL: Directory w/ DSP files don't exist" <<
LogVar(
"Directory",
383 MainDir / RunSubDir));
384 for (boost::filesystem::directory_entry& x : boost::filesystem::recursive_directory_iterator(MainDir / RunSubDir)) {
385 if (!std::regex_match(x.path().string(),
Filter) || !boost::filesystem::is_regular_file(x.path()))
continue;
386 int iCrate = atoi(std::regex_replace(x.path().string(),
Filter,
"$2").c_str());
387 int iShaperPosition = atoi(std::regex_replace(x.path().string(),
Filter,
"$4").c_str());
388 int iShaper = (iCrate - 1) * 12 + iShaperPosition;
389 if (iCrate > 36 && iCrate < 45) {
390 if (iShaperPosition > 10)
continue;
391 }
else if (iCrate > 44) {
392 if (iShaperPosition > 8)
continue;
395 callbackCalibration(dspdata, map_container_vec[iShaper],
396 map_container_coef[iShaper]);
397 callbackCalibration(m_calibrationThrA0, v_totalthrA0);
398 callbackCalibration(m_calibrationThrAhard, v_totalthrAhard);
399 callbackCalibration(m_calibrationThrAskip, v_totalthrAskip);
405 int iShaper = conversion(cellID);
406 int iChannelPosition = mapper.getShaperChannel(cellID);
408 const auto& map_vec = map_container_vec[iShaper];
409 const short int* f = vectorsplit(map_vec.at(
"F"), iChannelPosition);
410 const short int* f1 = vectorsplit(map_vec.at(
"F1"), iChannelPosition);
411 const short int* fg31 = vectorsplit(map_vec.at(
"F31"), iChannelPosition);
412 const short int* fg32 = vectorsplit(map_vec.at(
"F32"), iChannelPosition);
413 const short int* fg33 = vectorsplit(map_vec.at(
"F33"), iChannelPosition);
414 const short int* fg41 = vectorsplit(map_vec.at(
"F41"), iChannelPosition);
415 const short int* fg43 = vectorsplit(map_vec.at(
"F43"), iChannelPosition);
417 const auto& map_coef = map_container_coef[iShaper];
418 int k_a = map_coef.at(
"k_a");
419 int k_b = map_coef.at(
"k_b");
420 int k_c = map_coef.at(
"k_c");
421 int k_1 = map_coef.at(
"k_1");
422 int k_2 = map_coef.at(
"k_2");
423 int k_16 = map_coef.at(
"k_16");
424 int chi_thres = map_coef.at(
"chi_thres");
426 int A0 = (int)v_totalthrA0[cellID - 1];
427 int Ahard = (int)v_totalthrAhard[cellID - 1];
428 int Askip = (int)v_totalthrAskip[cellID - 1];
430 int* y = adc_data.data();
431 int ttrig2 = trigger_time - 2 * (trigger_time / 8);
433 auto result = lftda_(f, f1, fg41, fg43, fg31, fg32, fg33, y, ttrig2, A0,
434 Ahard, Askip, k_a, k_b, k_c, k_16, k_1, k_2, chi_thres,
436 m_AmpFit = result.amp;
437 m_TimeFit = result.time;
438 m_QualityFit = result.quality;
440 if (result.skip_thr || result.hit_thr) m_QualityFit += 4;
445 for (
int i = 0; i < 4; i++) {
446 h_amp_timefail[i]->Reset();
447 h_time_ampfail[i]->Reset();
449 for (
int i = 0; i < 4; i++) {
450 for (
int j = 0; j < 3; j++) {
451 h_amp_qualityfail[i][j]->Reset();
452 h_time_qualityfail[i][j]->Reset();
455 h_ampfail_quality->Reset();
456 h_timefail_quality->Reset();
457 h_ampfail_cellid->Reset();
458 h_timefail_cellid->Reset();
459 h_amptimefail_cellid->Reset();
460 h_ampfail_shaperid->Reset();
461 h_timefail_shaperid->Reset();
462 h_amptimefail_shaperid->Reset();
463 h_ampfail_crateid->Reset();
464 h_timefail_crateid->Reset();
465 h_amptimefail_crateid->Reset();
466 h_qualityfail_cellid->Reset();
467 h_qualityfail_shaperid->Reset();
468 h_qualityfail_crateid->Reset();
469 if (m_SaveDetailedFitData) {
470 h_ampdiff_cellid->Reset();
471 h_timediff_cellid->Reset();
472 h_ampdiff_shaperid->Reset();
473 h_timediff_shaperid->Reset();
475 h_ampdiff_quality->Reset();
476 h_timediff_quality->Reset();
477 h_quality_fit_data->Reset();
478 h_ampflag_qualityfail->Reset();
479 h_timeflag_qualityfail->Reset();
484 if (m_TRGSummary.isValid()) {
487 int timing_type = m_TRGSummary->getTimType();
488 for (
auto& skipped_timing_type : m_skipEvents) {
489 if (timing_type == skipped_timing_type)
return;
493 int iAmpflag_qualityfail = 0;
494 int iTimeflag_qualityfail = 0;
496 for (
auto& aECLDsp : m_ECLDsps) {
497 m_CellId = aECLDsp.getCellId();
498 std::vector<int> DspArray = aECLDsp.getDspA();
499 if (!m_ECLTrigs.isValid()) B2FATAL(
"ECL DQM logic test FATAL: Trigger time information is not available");
500 for (
auto& aECLTrig : m_ECLTrigs) {
501 if (aECLTrig.getTrigId() == mapper.getCrateID(m_CellId)) {
502 m_TrigTime = aECLTrig.getTimeTrig();
507 emulator(m_CellId, m_TrigTime, DspArray);
510 if ((m_AmpFit >= (
int)v_totalthrAskip[m_CellId - 1]) && m_QualityFit < 4 && !aECLDigit)
511 B2ERROR(
"ECL DQM logic test error: ECL Digit does not exist for A_emulator > Thr_skip"
512 <<
LogVar(
"Thr_skip", (
int)v_totalthrAskip[m_CellId - 1])
513 <<
LogVar(
"A_emulator", m_AmpFit)
514 <<
LogVar(
"Quality_emulator", m_QualityFit));
516 if ((m_AmpFit >= (
int)v_totalthrAskip[m_CellId - 1]) && aECLDigit) {
518 m_AmpData = aECLDigit->
getAmp();
522 if (m_AmpFit != m_AmpData) {
523 for (
int i = 0; i < 4; i++)
if (m_QualityData == i && m_TimeFit == m_TimeData) h_time_ampfail[i]->Fill(m_TimeData);
524 h_ampfail_quality->Fill(m_QualityData);
525 h_ampfail_cellid->Fill(m_CellId);
526 h_ampfail_shaperid->Fill(conversion(m_CellId));
527 h_ampfail_crateid->Fill(mapper.getCrateID(m_CellId));
528 if (m_SaveDetailedFitData) {
529 h_ampdiff_cellid->Fill(m_CellId, m_AmpFit - m_AmpData);
530 h_ampdiff_shaperid->Fill(conversion(m_CellId), m_AmpFit - m_AmpData);
532 h_ampdiff_quality->Fill(m_QualityData, m_AmpFit - m_AmpData);
534 if (m_TimeFit != m_TimeData) {
535 for (
int i = 0; i < 4; i++)
if (m_QualityData == i && m_AmpFit == m_AmpData) h_amp_timefail[i]->Fill(m_AmpData);
536 h_timefail_quality->Fill(m_QualityData);
537 h_timefail_cellid->Fill(m_CellId);
538 h_timefail_shaperid->Fill(conversion(m_CellId));
539 h_timefail_crateid->Fill(mapper.getCrateID(m_CellId));
540 if (m_SaveDetailedFitData) {
541 h_timediff_cellid->Fill(m_CellId, m_TimeFit - m_TimeData);
542 h_timediff_shaperid->Fill(conversion(m_CellId), m_TimeFit - m_TimeData);
544 h_timediff_quality->Fill(m_QualityData, m_TimeFit - m_TimeData);
546 if (m_AmpFit != m_AmpData && m_TimeFit != m_TimeData) {
547 h_amptimefail_cellid->Fill(m_CellId);
548 h_amptimefail_shaperid->Fill(conversion(m_CellId));
549 h_amptimefail_crateid->Fill(mapper.getCrateID(m_CellId));
551 if (m_QualityFit != m_QualityData) {
552 for (
int i = 0; i < 4; i++) {
553 for (
int j = 0; j < 3; j++) {
555 if (i == 0) k = j + 1;
556 if (i == 1) {
if (j == 0) k = j;
else k = j + 1; }
557 if (i == 2) {
if (j == 2) k = j + 1;
else k = j; }
559 if (m_QualityFit == i && m_QualityData == k) { h_amp_qualityfail[i][j]->Fill(m_AmpData); h_time_qualityfail[i][j]->Fill(m_TimeData); }
562 if (m_AmpFit != m_AmpData) iAmpflag_qualityfail = 1;
563 if (m_TimeFit != m_TimeData) iTimeflag_qualityfail = 1;
564 h_qualityfail_cellid->Fill(m_CellId);
565 h_qualityfail_shaperid->Fill(conversion(m_CellId));
566 h_qualityfail_crateid->Fill(mapper.getCrateID(m_CellId));
567 h_ampflag_qualityfail->Fill(m_QualityData, iAmpflag_qualityfail);
568 h_timeflag_qualityfail->Fill(m_QualityData, iTimeflag_qualityfail);
569 h_quality_fit_data->Fill(m_QualityFit, m_QualityData);
571 if (m_AmpFit != m_AmpData || m_TimeFit != m_TimeData || m_QualityFit != m_QualityData) {
572 h_fail_shaperid->Fill(conversion(m_CellId));
573 h_fail_crateid->Fill(mapper.getCrateID(m_CellId));
575 h_ampfail_quality->Fill(-1);
576 h_timefail_quality->Fill(-1);