Belle II Software  release-05-02-19
xsi.h
1 // Copyright 2010, Xilinx Inc. All rights reserved.
2 // $Id: xsi.h,v 1.3 2011/04/19 21:26:27 kumar Exp $
3 
4 #ifndef ISIM_XSI_H
5 #define ISIM_XSI_H
6 
7 #ifdef __cplusplus
8 extern "C" {
9 #endif
10 
11 #if defined (_MSC_VER)
12 typedef unsigned __int64 uint64_t;
13 typedef unsigned __int32 uint32_t;
14 typedef unsigned __int8 uint8_t;
15 typedef signed __int64 int64_t;
16 typedef signed __int32 int32_t;
17 typedef signed __int8 int8_t;
18 #elif defined(__MINGW32__)
19 #include <stdint.h>
20 #elif defined(__linux)
21 #include <inttypes.h>
22 #else
23 #include <sys/types.h>
24 #endif
25 
26 #ifndef XSI_TYPES
27 #define XSI_TYPES
28 typedef int64_t XSI_INT64;
29 typedef uint64_t XSI_UINT64;
30 typedef int XSI_INT32;
31 typedef unsigned int XSI_UINT32;
32 typedef short XSI_INT16;
33 typedef unsigned short XSI_UINT16;
34 typedef char XSI_BYTE8;
35 typedef unsigned char XSI_UBYTE8;
36 #endif
37 
38 
39 /* Port Kinds */
40 #define xsiInputPort 1
41 #define xsiOutputPort 2
42 #define xsiInoutPort 3
43 
44 
45 /* Error types */
46 #define xsiNormal 1
47 #define xsiError 2
48 #define xsiFatalError 3
49 
50 
51 /* Properties to be used in xsi_get_int and xsi_get_str calls */
52 
53 /* Returns number of ports in the top module (first top in case of multiple top designs) */
54 #define xsiNumTopPorts 1
55 
56 /* The time precision of simulation used by the XSim simulation kernel */
57 /* Valid time precision values are from 0 to -15 and they represent following:
58 * 0 : 1 s,
59 * -1 : 100 ms, -2 : 10 ms, -3 : 1 ms, -4: 100 us, -5: 10 us, -6: 1 us
60 * -7 : 100 ns, -8 : 10 ns, -9 : 1 ns, -10: 100 ps, -11: 10 ps, -12: 1 ps
61 * -13: 100 fs, -14: 10 fs, -15: 1 fs
62 */
63 #define xsiTimePrecisionKernel 2
64 
65 /* Returns port kinds: xsiInputPort, xsiOutputPort, xsiInoutPort */
66 #define xsiDirectionTopPort 3
67 
68 /* Returns number of bits for Verilog wire and reg types */
69 /* Returns number of bytes for VHDL and other Verilog types */
70 /* For Verilog reg/wire values are bit packed in 32 bit words */
71 /* The (number of bits + 1)/32 will give the number of 32 bit words */
72 /* needed to store the value for a Verilog reg/wire HDL object */
73 /* For VHDL and other Verilog types values are contigous array of */
74 /* scalars. For example std_logic_vector(0 to 2) is stored in 3 bytes*/
75 /* where each byte stores one std_logic value*/
76 #define xsiHDLValueSize 4
77 
78 /* Returns const char* string. Memory is owned by XSim Kernel */
79 #define xsiNameTopPort 5
80 
81 
82 
83 /* Use XSI_DLLESPEC to export symbols out of XSim Kernel
84  and import into client code. Use XSI_DESIGN_DLLESPEC
85  to export symbols out of xelab generated dll i.e.
86  user design dll and import into client/XSim Kernel code
87 */
88 #if defined(_WIN32)
89 #ifdef XSI_EXPORT
90 #define XSI_DLLESPEC __declspec(dllexport)
91 #define XSI_HIDE_SYMBOL_SPEC true
92 #else
93 #define XSI_DLLESPEC __declspec(dllimport)
94 #endif
95 #else
96 #ifndef XSI_DLLESPEC
97 #define XSI_DLLESPEC
98 #endif
99 #endif
100 
101 #if defined(_WIN32)
102 #ifdef XSI_DESIGN_DLL_EXPORT
103 #define XSI_DESIGN_DLLESPEC __declspec(dllexport)
104 #else
105 #define XSI_DESIGN_DLLESPEC __declspec(dllimport)
106 #endif
107 #else
108 #ifndef XSI_DESIGN_DLLESPEC
109 #define XSI_DESIGN_DLLESPEC
110 #endif
111 #endif
112 
113 /* A generic pointer to an object in the design */
114 typedef void* xsiHandle;
115 
116 /* Verilog logic values are stored bit packed encoded in two bits
117  * one bit put into aVal and the other into bVal. The four logic
118  * values are encoded as {aVal, bVal}: 0=00, 1=10, X=11, Z=01
119  * So, a 8 bit logic value 0Z11011X is stored as below :
120  * (in hexadecimal) aVal = 00000037 bVal=00000041 */
121 typedef struct t_xsi_vlog_logicval {
122  XSI_UINT32 aVal;
123  XSI_UINT32 bVal;
125 
126 /* Note: VHDL std_logic value is stored in a byte (char). The
127  * MVL9 values are mapped as 'U':00, 'X':1, '0':2, '1':3
128  * 'Z':4, 'W':5, 'L':6, 'H':7, '-':8 . The std_logic_vector
129  * is stored as a contiguous array of bytes. For example
130  * "0101Z" is stored in five bytes as char s[5] = {2,3,2,3,4}
131  * An HDL integer type is stored as C int, a HDL real type is
132  * stored as a C double and a VHDL string type is stored as char*.
133  * An array of HDL integer or double is stored as an array of C
134  * integer or double respectively */
135 
136 /* Pass start up switches using this struct */
137 typedef struct t_xsi_setup_info {
138  char* logFileName;
139  char* wdbFileName;
141 
142 /* For each function supported by XSI, a typedef has been provided
143  * below for easily storing the function pointer address of the
144  * XSI function.
145  */
146 typedef xsiHandle(*t_fp_xsi_open)(p_xsi_setup_info);
147 typedef int (*t_fp_xsi_get_port_number)(xsiHandle, const char*);
148 typedef void (*t_fp_xsi_put_value)(xsiHandle, XSI_INT32, void*);
149 typedef int (*t_fp_xsi_get_value)(xsiHandle, XSI_INT32, void*);
150 typedef void (*t_fp_xsi_run)(xsiHandle, XSI_INT64);
151 typedef void (*t_fp_xsi_restart)(xsiHandle);
152 typedef int (*t_fp_xsi_get_int)(xsiHandle, XSI_INT32);
153 typedef int (*t_fp_xsi_get_int_port)(xsiHandle, XSI_INT32, XSI_INT32);
154 typedef const char* (*t_fp_xsi_get_str_port)(xsiHandle, XSI_INT32, XSI_INT32);
155 typedef int (*t_fp_xsi_get_status)(xsiHandle);
156 typedef const char* (*t_fp_xsi_get_error_info)(xsiHandle);
157 typedef void (*t_fp_xsi_close)(xsiHandle);
158 typedef void (*t_fp_xsi_trace_all)(xsiHandle);
159 
174 #ifndef XSI_HIDEFUNCTIONSPEC
175 XSI_DESIGN_DLLESPEC xsiHandle xsi_open(p_xsi_setup_info setup_info);
176 #endif
177 
185 XSI_DLLESPEC XSI_INT32 xsi_get_port_number(xsiHandle design_handle, const char* port_name);
186 
195 XSI_DLLESPEC void xsi_put_value(xsiHandle design_handle, XSI_INT32 port_number, void* port_value);
196 
205 XSI_DLLESPEC void xsi_get_value(xsiHandle design_handle, XSI_INT32 port_number, void* port_value);
206 
217 XSI_DLLESPEC void xsi_run(xsiHandle design_handle, XSI_UINT64 time_ticks);
218 
222 XSI_DLLESPEC void xsi_restart(xsiHandle design_handle);
223 
224 
232 XSI_DLLESPEC XSI_INT32 xsi_get_int(xsiHandle design_handle, XSI_INT32 property);
233 
234 
243 XSI_DLLESPEC XSI_INT32 xsi_get_int_port(xsiHandle design_handle, XSI_INT32 port_number, XSI_INT32 property);
244 
245 
254 XSI_DLLESPEC const char* xsi_get_str_port(xsiHandle design_handle, XSI_INT32 port_number, XSI_INT32 property);
255 
260 XSI_DLLESPEC XSI_INT32 xsi_get_status(xsiHandle design_handle);
261 
266 XSI_DLLESPEC const char* xsi_get_error_info(xsiHandle design_handle);
267 
273 XSI_DLLESPEC void xsi_trace_all(xsiHandle design_handle);
274 
278 XSI_DLLESPEC void xsi_close(xsiHandle design_handle);
279 
280 
281 #ifdef __cplusplus
282 }
283 #endif
284 
285 #endif
286 
287 
288 // 67d7842dbbe25473c3c32b93c0da8047785f30d78e8a024de1b57352245f9689
t_xsi_vlog_logicval::bVal
XSI_UINT32 bVal
aVal = 00000037
Definition: xsi.h:123
t_xsi_vlog_logicval
Verilog logic values are stored bit packed encoded in two bits one bit put into aVal and the other in...
Definition: xsi.h:121
t_xsi_setup_info
Note: VHDL std_logic value is stored in a byte (char).
Definition: xsi.h:137
t_xsi_setup_info::wdbFileName
char * wdbFileName
A Null value means turn off log file generation.
Definition: xsi.h:139