13 #ifndef TRGCDCTrackSegmentFinder_FLAG_
14 #define TRGCDCTrackSegmentFinder_FLAG_
18 #include <TClonesArray.h>
19 #include "trg/trg/Board.h"
20 #include "trg/trg/SignalVector.h"
21 #include "trg/trg/SignalBundle.h"
23 #ifdef TRGCDC_SHORT_NAMES
24 #define TCTSFinder TRGCDCTrackSegmentFinder
25 #define TSFinder TRGCDCTrackSegmentFinder
36 class TRGCDCSegmentHit;
42 public std::vector <const TRGCDCMerger*> {
59 const std::string&
name,
65 const std::vector<TRGCDCSegment*>& tsSL);
72 void doit(std::vector<TRGCDCSegment* >& tss,
const bool trackSegmentClockSimulation,
73 std::vector<TRGCDCSegmentHit* >& segmentHits, std::vector<TRGCDCSegmentHit* >* segmentHitsSL);
79 void saveTSFResults(std::vector<TRGCDCSegmentHit* >* segmentHitsSL);
A class to represent a trigger board.
A class to represent a CDC merger board.
a class of TrackSegmentFinder in TRGCDC
TRGSignalBundle * _tosbE
Input signal bundle.
std::vector< TRGSignal * > _priMap
Internal data of the priority hit timing.
TClonesArray * m_hitPatternInformation
Stores hitpattern information.
std::vector< TRGSignal * > _edg4Map
Internal data of the edge timing information.
boardType _type
Unit type.
TRGSignalVector * packerOuterTracker(vector< TRGSignalVector * > &, vector< int > &, const unsigned)
Packing output for tracker.
vector< TRGSignalVector * > simulateTSF(TRGSignalVector *in, unsigned id)
Simulate TSF response (unified version, 2016/07/12)
std::vector< TRGSignal * > _edg0Map
Internal data of the edge timing information.
TRGSignalVector * packerForTracker(vector< TRGSignalVector * > &, vector< int > &, const unsigned)
Output packer for tracker.
TRGSignalBundle * outputE(void)
signal bundle of outputE
TTree * m_treeInputTSF
ROOT TTree for input.
TRGSignalBundle * _tosbT
Output signal bundle.
bool m_makeRootFile
make ROOT file or not
const TRGCDC & _cdc
Members.
static std::string version(void)
return version
vector< TRGSignalVector * > simulateTSFOld(TRGSignalVector *in, unsigned id)
Simulate TSF response (unified version)
TRGSignalVector * packerOuterEvt(vector< TRGSignalVector * >, vector< int >, int)
Packing output for evtTime & Low pT.
TClonesArray * m_particleEfficiency
[Efficiency, Pt, # MC TS] Efficiency = -1 means that # MC TS is 0.
std::vector< TRGSignalVector * > _toBeDeleted
One time info. to be deleted in next event;.
TRGSignalVector * packerForETF(vector< TRGSignalVector * > &, vector< int > &, const unsigned)
Output packer for ETF.
std::string m_rootTSFFilename
ROOT file name string.
vector< TRGSignalVector * > findTSHit(TRGSignalVector *eachInput, int)
Use LUT for find TSHit.
TRGCDCTrackSegmentFinder(const TRGCDC &, const std::string &name, boardType type, const TRGClock &systemClock, const TRGClock &dataClock, const TRGClock &userClockInput, const TRGClock &userClockOutput, const std::vector< TRGCDCSegment * > &tsSL)
Constructor.
std::vector< TRGSignal * > _edg1Map
Internal data of the edge timing information.
TClonesArray * m_nnPatternInformation
[superlayer id, lrDriftTime, timeWire0, timeWire1, ..., ...]
vector< TRGSignalVector * > simulateTSF2(TRGSignalVector *in, unsigned id)
Simulate TSF response (unified version, state machine)
TTree * m_treeOutputTSF
ROOT TTree for output.
std::vector< TRGSignal * > _edg2Map
Internal data of the edge timing information.
TClonesArray * m_tsInformation
[SuperLayer Id, Wire Id, Priority Timing]
std::vector< TRGSignalVector * > _tsfOut
TSF response storeage.
std::vector< TRGSignal * > _hitMap[5]
Internal data of wire hit map.
TTree * m_treeNNTSF
ROOT Tree for NNTSF.
std::vector< TRGSignal * > _secMap
Internal data of the priority cell hit position flag.
std::vector< TCSegment * > _tsSL
list of TSF
std::vector< TRGSignalVector * > _tsfIn
TSF input storage.
TFile * m_fileTSF
ROOT file.
void simulateBoard(void)
firmware simulation.
std::vector< TRGSignal * > _edg3Map
Internal data of the edge timing information.
TRGSignalBundle * outputT(void)
signal bundle of outputT
double mkint(TRGState)
tranformatoin into integer
vector< bool > mkbool(int, int)
tranformatoin into bool
vector< TRGSignalVector * > simulateOuter(TRGSignalVector *in, unsigned id)
Simulate TSF response for the inner.
bool m_logicLUTFlag
0 is Logic. 1 is LUT.
std::vector< TRGSignal * > _fasMap
Internal data of the fastest hit timing.
boardType
enum of boardType of TrackSegmentFinder
The instance of TRGCDC is a singleton.
A class to represent a digitized signal. Unit is nano second.
A class to represent a bundle of SignalVectors.
A class to represent a bundle of digitized signals.
A class to represent a digitized signal. Unit is nano second.
A class to represent a state of multi bits.
~TRGCDCTrackSegmentFinder()
Destructor.
void fastestTimingOuter(unsigned tsfID, const unsigned nTSF, TRGSignalVector &s) const
Make TRGSignals for the fastest timing bits.
void simulateOuter(void)
Firmware simulation for the outers. yi.
void priorityTiming(unsigned tsfID, const unsigned nTSF, TRGSignalVector &s, const TRGSignal ¢er, const TRGSignal &right, const TRGSignal &left) const
Make TRGSignals for the priority timing bits.
void terminate(void)
terminate
void push_back(const TRGCDCMerger *)
push back the Mergers of this TSF
void inputOuter(const unsigned id, const unsigned nTSF, TRGSignalVector *s)
Creates input signals to TSF for the outer.
const std::string & name(void) const
returns name.
TRGCDCTrackSegmentFinder(const TRGCDC &, bool makeRootFile, bool logicLUTFlag)
Constructor.
void simulateInner(void)
Firmware simulation for the outers. yi.
void saveTSFResults(std::vector< TRGCDCSegmentHit * > *segmentHitsSL)
save result of TSF
static void addID(TRGSignalVector &s, unsigned id)
Add TSF ID to timing signal vector for the output.
void saveTSInformation(std::vector< TRGCDCSegment * > &tss)
save the TS info
void hitMapOuter(void)
Creates the hit maps for the outer.
void simulate2(void)
Firmware simulation. Unified version of inner and outer : yi.
void doit(std::vector< TRGCDCSegment * > &tss, const bool trackSegmentClockSimulation, std::vector< TRGCDCSegmentHit * > &segmentHits, std::vector< TRGCDCSegmentHit * > *segmentHitsSL)
Member functions of doing TSF.
void inputInner(const unsigned id, const unsigned nTSF, TRGSignalVector *s)
Creates input signals to TSF for the inner.
void saveNNTSInformation(std::vector< TRGCDCSegment * > &tss)
Saves NNTS information. Only when ts is hit.
void simulate(void)
Firmware simulation. yi.
void hitMapInner(void)
Creates the hit maps for the inner.
boardType type(void) const
board type of TSF
void fastestTimingInner(unsigned tsfID, const unsigned nTSF, TRGSignalVector &s) const
Make TRGSignals for the fastest timing bits.
Abstract base class for different kinds of events.