Belle II Software  release-06-02-00
CDCTriggerTSFModule.cc
1 /**************************************************************************
2  * basf2 (Belle II Analysis Software Framework) *
3  * Author: The Belle II Collaboration *
4  * *
5  * See git log for contributors and copyright holders. *
6  * This file is licensed under LGPL-3.0, see LICENSE.md. *
7  **************************************************************************/
8 #include "trg/cdc/modules/trgcdc/CDCTriggerTSFModule.h"
9 
10 #include <cdc/dataobjects/CDCSimHit.h>
11 #include <cdc/dataobjects/CDCRawHit.h>
12 #include <mdst/dataobjects/MCParticle.h>
13 
14 #include <cdc/geometry/CDCGeometryPar.h>
15 #include <trg/cdc/Layer.h>
16 #include <trg/cdc/Wire.h>
17 #include <trg/cdc/WireHit.h>
18 #include <trg/cdc/Segment.h>
19 
20 #include <fstream>
21 
22 #define P3D HepGeom::Point3D<double>
23 
24 using namespace std;
25 using namespace Belle2;
26 
27 //this line registers the module with the framework and actually makes it available
28 //in steering files or the the module list (basf2 -m).
29 REG_MODULE(CDCTriggerTSF);
30 
31 CDCTriggerTSFModule::CDCTriggerTSFModule() : Module::Module()
32 {
34  "The Track Segment Finder module of the CDC trigger.\n"
35  "Combines CDCHits from the same super layer to CDCTriggerSegmentHits.\n"
36  );
38  addParam("CDCHitCollectionName",
40  "Name of the input StoreArray of CDCHits.",
41  string("CDCHits4Trg"));
42  addParam("TSHitCollectionName",
44  "Name of the output StoreArray of CDCTriggerSegmentHits.",
45  string(""));
46  addParam("InnerTSLUTFile",
48  "The filename of LUT for track segments from the inner-most super layer",
49  string(""));
50  addParam("OuterTSLUTFile",
52  "The filename of LUT for track segments from the outer super layers",
53  string(""));
54  addParam("ClockSimulation",
56  "Switch to simulate each data clock cycle separately.",
57  false);
58  addParam("makeTrueLRTable",
60  "Switch to create a table of hit pattern <-> "
61  "number of true left / true right, which is needed to create the LUT",
62  false);
63  addParam("innerTrueLRTableFilename",
65  "Filename for the true left/right table for the innermost super layer.",
66  string("innerTrueLRTable.dat"));
67  addParam("outerTrueLRTableFilename",
69  "Filename for the true left/right table for the outer super layers.",
70  string("outerTrueLRTable.dat"));
71  addParam("Deadchannel",
73  "Mask dead channels based on database. True:mask False:unmask",
74  true);
75  addParam("Crosstalk_tdcfilter",
77  "TDC based crosstalk filtering logic on CDCFE. True:enable False:disable",
78  true);
79 }
80 
81 void
83 {
84  // register DataStore elements
85  m_segmentHits.registerInDataStore(m_TSHitCollectionName);
87  if (m_makeTrueLRTable) {
88  StoreArray<CDCSimHit> simhits;
89  simhits.isRequired();
90  innerTrueLRTable.assign(pow(2, 16), vector<unsigned>(3, 0));
91  outerTrueLRTable.assign(pow(2, 12), vector<unsigned>(3, 0));
92  }
93  // register relations
94  StoreArray<MCParticle> mcparticles;
95  m_segmentHits.registerRelationTo(m_cdcHits);
96  mcparticles.registerRelationTo(m_segmentHits);
97 
98  // Prepare track segment shapes.
99  // First a structure of wires is created for all layers and super layers.
100  // Each track segment consists of pointers to wires in this structure.
102  const unsigned nLayers = cdc.nWireLayers();
103  TRGClock* clockTDC = new TRGClock("CDCTrigger TDC clock", 0, 500. / cdc.getTdcBinWidth());
104  TRGClock* clockData = new TRGClock("CDCTrigger data clock", *clockTDC, 1, 16);
105  clocks.push_back(clockTDC);
106  clocks.push_back(clockData);
107 
108  //...Loop over layers...
109  int superLayerId = -1;
110  unsigned lastNWires = 0;
111  int lastShifts = -1000;
112  // separate counters for axial and stereo layers and super layers
113  int ia = -1;
114  int is = -1;
115  int ias = -1;
116  int iss = -1;
117  /* cppcheck-suppress variableScope */
118  unsigned axialStereoLayerId;
119  unsigned axialStereoSuperLayerId = 0;
120  unsigned nWires = 0;
121  for (unsigned i = 0; i < nLayers; i++) {
122  const unsigned nWiresInLayer = cdc.nWiresInLayer(i);
123 
124  //...Axial or stereo?...
125  int nShifts = cdc.nShifts(i);
126  bool axial = (nShifts == 0);
127  if (axial) ++ia;
128  else ++is;
129  axialStereoLayerId = (axial) ? ia : is;
130 
131  //...Is this in a new super layer?...
132  if ((lastNWires != nWiresInLayer) || (lastShifts != nShifts)) {
133  ++superLayerId;
134  superLayers.push_back(vector<TRGCDCLayer*>());
135  if (axial) ++ias;
136  else ++iss;
137  axialStereoSuperLayerId = (axial) ? ias : iss;
138  lastNWires = nWiresInLayer;
139  lastShifts = nShifts;
140  }
141 
142  //...Calculate radius of adjacent field wires...
143  const float swr = cdc.senseWireR(i);
144  const float innerRadius = cdc.fieldWireR(i - 1);
145  const float outerRadius = (i < nLayers - 1) ?
146  cdc.fieldWireR(i) :
147  swr + (swr - innerRadius);
148 
149  //...New layer...
150  TRGCDCLayer* layer = new TRGCDCLayer(i,
151  superLayerId,
152  superLayers[superLayerId].size(),
153  axialStereoLayerId,
154  axialStereoSuperLayerId,
155  cdc.zOffsetWireLayer(i),
156  nShifts,
157  M_PI * swr * swr / nWiresInLayer,
158  nWiresInLayer,
159  innerRadius,
160  outerRadius);
161  superLayers.back().push_back(layer);
162 
163  //...Loop over all wires in a layer...
164  for (unsigned j = 0; j < nWiresInLayer; j++) {
165  const P3D fp = P3D(cdc.wireForwardPosition(i, j).x(),
166  cdc.wireForwardPosition(i, j).y(),
167  cdc.wireForwardPosition(i, j).z());
168  const P3D bp = P3D(cdc.wireBackwardPosition(i, j).x(),
169  cdc.wireBackwardPosition(i, j).y(),
170  cdc.wireBackwardPosition(i, j).z());
171  TRGCDCWire* tw = new TRGCDCWire(nWires++, j, *layer, fp, bp, *clockTDC);
172  layer->push_back(tw);
173  }
174  }
175 
176  //...Make TSF's...
177  const unsigned nWiresInTS[2] = {15, 11};
178  const int shape[2][30] = {
179  {
180  -2, 0, // relative layer id, relative wire id
181  -1, -1,
182  -1, 0,
183  0, -1,
184  0, 0,
185  0, 1,
186  1, -2,
187  1, -1,
188  1, 0,
189  1, 1,
190  2, -2,
191  2, -1,
192  2, 0,
193  2, 1,
194  2, 2
195  },
196  {
197  -2, -1,
198  -2, 0,
199  -2, 1,
200  -1, -1,
201  -1, 0,
202  0, 0,
203  1, -1,
204  1, 0,
205  2, -1,
206  2, 0,
207  2, 1,
208  0, 0,
209  0, 0,
210  0, 0,
211  0, 0
212  }
213  };
214  const int layerOffset[2] = {5, 2};
215  unsigned id = 0;
216  unsigned idTS = 0;
217  for (unsigned i = 0; i < superLayers.size(); i++) {
218  unsigned tsType = (i) ? 1 : 0;
219 
220  //...TS layer... w is a central wire
221  const TRGCDCCell* ww = superLayers[i][layerOffset[tsType]]->front();
222  TRGCDCLayer* layer = new TRGCDCLayer(id++, *ww);
223  tsLayers.push_back(layer);
224 
225  //...Loop over all wires in a central wire layer...
226  const unsigned nWiresInLayer = ww->layer().nCells();
227  B2DEBUG(100, "SL " << i << " layerOffset " << layerOffset[tsType] << ", "
228  << superLayers[i].size() << " layers, " << nWiresInLayer << " wires");
229  for (unsigned j = 0; j < nWiresInLayer; j++) {
230  const TRGCDCWire& w =
231  (TRGCDCWire&) superLayers[i][layerOffset[tsType]]->cell(j);
232 
233  const unsigned localId = w.localId();
234  const unsigned layerId = w.localLayerId();
235  vector<const TRGCDCWire*> cells;
236 
237  B2DEBUG(110, "TS localId " << localId << " layerId " << layerId);
238 
239  for (unsigned k = 0; k < nWiresInTS[tsType]; k++) {
240  const int laid = layerId + shape[tsType][k * 2];
241  const int loid = localId + shape[tsType][k * 2 + 1];
242 
243  B2DEBUG(120, "cell localId " << loid << " layerId " << laid);
244 
245  const TRGCDCWire& c =
246  (TRGCDCWire&) superLayers[i][laid]->cell(loid);
247 
248  cells.push_back(&c);
249  }
250 
251  TRGCDCSegment* ts;
252  if (w.superLayerId()) {
253  ts = new TRGCDCSegment(idTS++,
254  *layer,
255  w,
256  *clockData,
258  cells);
259  } else {
260  ts = new TRGCDCSegment(idTS++,
261  *layer,
262  w,
263  *clockData,
265  cells);
266  }
267  ts->initialize();
268  layer->push_back(ts);
269  }
270  }
271 
272 }
273 
274 void
276 {
277  if (m_deadchflag) {
278  if (not m_db_deadchannel.isValid()) {
279  StoreObjPtr<EventMetaData> evtMetaData;
280  B2ERROR("No database for CDCTRG dead channel mapping. Channel masking is skipped. exp " << evtMetaData->getExperiment() << " run "
281  << evtMetaData->getRun());
282  for (unsigned int i = 0; i < nSuperLayers; i++) { //SL
283  for (unsigned int j = 0; j < MAX_N_LAYERS; j++) { //Layer
284  for (unsigned int k = 0; k < MAX_N_SCELLS; k++) { //
285  deadch_map[i][j][k] = true;
286  }
287  }
288  }
289  } else {
290  for (unsigned int i = 0; i < nSuperLayers; i++) { //SL
291  for (unsigned int j = 0; j < MAX_N_LAYERS; j++) { //Layer
292  for (unsigned int k = 0; k < MAX_N_SCELLS; k++) { //
293  deadch_map[i][j][k] = m_db_deadchannel->getdeadch(i, j, k);
294  }
295  }
296  }
297  }
298  }
299 }
300 
301 void
303 {
305 
306  // fill CDCHits into track segment shapes
307 
308  //crosstalk filter
309  vector<int> filtered_hit;
310  for (int i = 0; i < m_cdcHits.getEntries(); ++i) {
311  filtered_hit.push_back(0);
312  }
313 
314  if (m_crosstalk_tdcfilter) {
315  //check number of hits in each asic
316  int ncdchit_asic[500][6] = {0};
317  vector<int> id_ncdchit_asic[500][6];
318  for (int i = 0; i < m_cdcHits.getEntries(); ++i) {
319  RelationVector<CDCRawHit> cdcrawHits = m_cdcHits[i]->getRelationsTo<CDCRawHit>();
320  if (cdcrawHits.size() > 0) {
321  CDCRawHit* cdcrawhit = cdcrawHits[0];
322  int boardid = cdcrawhit->getBoardId();
323  int fechid = cdcrawhit->getFEChannel();
324  int asicid = fechid / 8;
325  if (boardid >= 0 && boardid < 500 && asicid >= 0 && asicid < 6) {
326  ncdchit_asic[boardid][asicid]++;
327  id_ncdchit_asic[boardid][asicid].push_back(i);
328  }
329  }
330  }
331  //check 16ns time coinsidence if >=4 hits are found in the same asic
332  for (int i = 0; i < 500; i++) {
333  for (int j = 0; j < 6; j++) {
334  if (ncdchit_asic[i][j] >= 4) {
335  std::vector<short> tdc_asic;
336  for (int k = 0; k < ncdchit_asic[i][j]; k++) {
337  short tdc = m_cdcHits[id_ncdchit_asic[i][j][k]]->getTDCCount();
338  tdc_asic.push_back(tdc);
339  }
340  std::sort(tdc_asic.begin(), tdc_asic.end());
341  for (int ncoin = ncdchit_asic[i][j]; ncoin >= 4; ncoin--) {
342  for (int k = 0; k < ncdchit_asic[i][j] - ncoin; k++) {
343  if (tdc_asic[k + ncoin - 1] - tdc_asic[k] <= 16) {
344  for (int l = k; l < k + ncoin - 1; l++) {
345  filtered_hit[id_ncdchit_asic[i][j][l]] = 1;
346  }
347  //break loop
348  ncoin = 0;
349  k = 8;
350  }
351  }
352  }
353  tdc_asic.clear();
354  }
355  }
356  }
357  }
358 
359  //...Loop over CDCHits...
360  for (int i = 0; i < m_cdcHits.getEntries(); ++i) {
361  // get the wire
362  const CDCHit& h = *m_cdcHits[i];
363  // mask dead channel
364  if (m_deadchflag) {
365  if (!deadch_map[h.getISuperLayer()][h.getILayer()][h.getIWire()]) {
366  continue;
367  }
368  }
369  // skim crosstalk hit
370  if (filtered_hit[i] == 1)continue;
371 
372  TRGCDCWire& w =
373  (TRGCDCWire&) superLayers[h.getISuperLayer()][h.getILayer()]->cell(h.getIWire());
374 
375  // trigger timing signal
376  const int tdcCount = floor((cdc.getT0(WireID(h.getID())) / cdc.getTdcBinWidth()
377  - h.getTDCCount() + 0.5) / 2);
378  TRGTime rise = TRGTime(tdcCount, true, w.signal().clock(), w.name());
379  TRGTime fall = rise;
380  fall.shift(1).reverse();
381  TRGSignal signal = rise & fall;
382  w.addSignal(signal);
383 
384  if (w.hit()) continue;
385  // make a trigger wire hit (needed for relations)
386  // all unneeded variables are set to 0 (TODO: remove them completely?)
387  TRGCDCWireHit* hit = new TRGCDCWireHit(w, i,
388  0, 0, 0, 0, 0, 0, 0, 0);
389  w.hit(hit);
390  }
391 
392 
393 
394  // neibor supression
395  unsigned neibor_hit[10][1000] = {};
396  for (unsigned isl = 0; isl < tsLayers.size(); ++isl) {
397  for (unsigned its = 0; its < tsLayers[isl]->nCells(); ++its) {
398  TRGCDCSegment& s = (TRGCDCSegment&) tsLayers[isl]->cell(its);
399  // simulate with logicLUTFlag = true
400  // TODO: either add parameter or remove the option in Segment::simulate()
401  s.simulate(m_clockSimulation, true,
403  if (!m_clockSimulation && s.signal().active() && s.priorityPosition() == 3) {
404  neibor_hit[isl][its] = 1;
405  }
406  }
407  }
408 
409  // simulate track segments and create track segment hits
410  for (unsigned isl = 0; isl < tsLayers.size(); ++isl) {
411  for (unsigned its = 0; its < tsLayers[isl]->nCells(); ++its) {
412  TRGCDCSegment& s = (TRGCDCSegment&) tsLayers[isl]->cell(its);
413  // simulate with logicLUTFlag = true
414  // TODO: either add parameter or remove the option in Segment::simulate()
415  s.simulate(m_clockSimulation, true,
417  // store hits and create relations
418  // for clock simulation already done in simulate
419  // TODO: move it to simulate also for simulateWithoutClock?
420  if (!m_clockSimulation && s.signal().active()) {
421 
422  //neibor supression
423  if (s.priorityPosition() != 3 && (neibor_hit[isl][(its - 1) % tsLayers[isl]->nCells()] == 1
424  || neibor_hit[isl][(its + 1) % tsLayers[isl]->nCells()] == 1))continue;
425 
426  const CDCHit* priorityHit = m_cdcHits[s.priority().hit()->iCDCHit()];
427  const CDCTriggerSegmentHit* tsHit =
428  m_segmentHits.appendNew(*priorityHit,
429  s.id(),
430  s.priorityPosition(),
431  s.LUT()->getValue(s.lutPattern()),
432  s.priorityTime(),
433  s.fastestTime(),
434  s.foundTime());
435  // relation to all CDCHits in segment
436  for (unsigned iw = 0; iw < s.wires().size(); ++iw) {
437  const TRGCDCWire* wire = (TRGCDCWire*)s[iw];
438  if (wire->signal().active()) {
439  // priority wire has relation weight 2
440  double weight = (wire == &(s.priority())) ? 2. : 1.;
441  tsHit->addRelationTo(m_cdcHits[wire->hit()->iCDCHit()], weight);
442  }
443  }
444  // relation to MCParticles (same as priority hit)
446  for (unsigned imc = 0; imc < mcrel.size(); ++imc) {
447  mcrel[imc]->addRelationTo(tsHit, mcrel.weight(imc));
448  }
449  // get true left/right
450  if (m_makeTrueLRTable) {
451  const CDCSimHit* simHit = priorityHit->getRelatedFrom<CDCSimHit>();
452  if (simHit && !simHit->getBackgroundTag()) {
453  if (isl == 0)
454  innerTrueLRTable[s.lutPattern()][simHit->getLeftRightPassage()] += 1;
455  else
456  outerTrueLRTable[s.lutPattern()][simHit->getLeftRightPassage()] += 1;
457  } else {
458  if (isl == 0)
459  innerTrueLRTable[s.lutPattern()][2] += 1;
460  else
461  outerTrueLRTable[s.lutPattern()][2] += 1;
462  }
463  }
464  }
465  }
466  }
467 
468  //...Clear hit information after we're finished...
469  clear();
470 }
471 
472 void
474 {
475  // delete clocks
476  for (unsigned ic = 0; ic < clocks.size(); ++ic) {
477  delete clocks[ic];
478  }
479  clocks.clear();
480 
481  // delete wire layers
482  for (unsigned isl = 0; isl < superLayers.size(); ++isl) {
483  for (unsigned il = 0; il < superLayers[isl].size(); ++il) {
484  for (unsigned iw = 0; iw < superLayers[isl][il]->nCells(); ++iw) {
485  delete &(superLayers[isl][il]->cell(iw));
486  }
487  delete superLayers[isl][il];
488  }
489  superLayers[isl].clear();
490  }
491  superLayers.clear();
492 
493  // delete TS layers
494  for (unsigned isl = 0; isl < tsLayers.size(); ++isl) {
495  for (unsigned its = 0; its < tsLayers[isl]->nCells(); ++its) {
496  delete &(tsLayers[isl]->cell(its));
497  }
498  delete tsLayers[isl];
499  }
500  tsLayers.clear();
501 
502  // save true left/right table
503  if (m_makeTrueLRTable) {
504  ofstream innerFile(m_innerTrueLRTableFilename);
505  ostream_iterator<unsigned> innerIterator(innerFile, " ");
506  for (unsigned pattern = 0; pattern < innerTrueLRTable.size(); ++pattern) {
507  copy(innerTrueLRTable[pattern].begin(), innerTrueLRTable[pattern].end(),
508  innerIterator);
509  innerFile << "\n";
510  }
511  ofstream outerFile(m_outerTrueLRTableFilename);
512  ostream_iterator<unsigned> outerIterator(outerFile, " ");
513  for (unsigned pattern = 0; pattern < outerTrueLRTable.size(); ++pattern) {
514  copy(outerTrueLRTable[pattern].begin(), outerTrueLRTable[pattern].end(),
515  outerIterator);
516  outerFile << "\n";
517  }
518  }
519 
520 }
521 
522 void
524 {
525  for (unsigned isl = 0; isl < superLayers.size(); ++isl) {
526  for (unsigned il = 0; il < superLayers[isl].size(); ++il) {
527  for (unsigned iw = 0; iw < superLayers[isl][il]->nCells(); ++iw) {
528  TRGCDCWire& w = (TRGCDCWire&) superLayers[isl][il]->cell(iw);
529  delete w.hit();
530  w.clear();
531  }
532  }
533  for (unsigned its = 0; its < tsLayers[isl]->nCells(); ++its) {
534  TRGCDCSegment& s = (TRGCDCSegment&) tsLayers[isl]->cell(its);
535  s.clear();
536  }
537  }
538 }
Class containing the result of the unpacker in raw data and the result of the digitizer in simulation...
Definition: CDCHit.h:40
The CDCRawHit (suppressed mode) class.
Definition: CDCRawHit.h:25
unsigned short getBoardId(void) const
Getter for boar ID.
Definition: CDCRawHit.h:92
unsigned short getFEChannel(void) const
Getter for FE channel.
Definition: CDCRawHit.h:84
Example Detector.
Definition: CDCSimHit.h:22
int getLeftRightPassage() const
The method to get new left/right info. for tracking.
Definition: CDCSimHit.h:244
Combination of several CDCHits to a track segment hit for the trigger.
std::vector< TRGCDCLayer * > tsLayers
structure to hold pointers to all track segment shapes
bool m_clockSimulation
switch for simulating clock by clock
std::string m_CDCHitCollectionName
name of the input StoreArray
std::string m_outerTrueLRTableFilename
filename for the table which contains the number of true left/right for each pattern in the outer sup...
bool m_crosstalk_tdcfilter
TDC based crosstalk filtering logic on CDCFE.
virtual void initialize() override
Initialize the module and register DataStore arrays.
virtual void event() override
Run the TSF for an event.
OptionalDBObjPtr< CDCTriggerDeadch > m_db_deadchannel
dbobject to store deadchannel
StoreArray< CDCTriggerSegmentHit > m_segmentHits
list of output track segment hits
virtual void terminate() override
Clean up pointers.
std::vector< std::vector< unsigned > > outerTrueLRTable
list of (# true right, # true left, # true background) for the outer super layers
std::string m_innerTSLUTFilename
The filename of LUT for the inner-most track segments.
virtual void beginRun() override
Register run-dependent DataStore arrays.
std::vector< std::vector< unsigned > > innerTrueLRTable
list of (# true right, # true left, # true background) for the inner-most super layer
bool m_makeTrueLRTable
switch for saving the number of true left/right for each pattern
std::string m_TSHitCollectionName
name of the output StoreArray
StoreArray< CDCHit > m_cdcHits
list of input CDC hits
void clear()
remove hit information from last event
std::string m_outerTSLUTFilename
The filename of LUT for outer track segments.
std::vector< TRGClock * > clocks
list of clocks used in the TSF
bool deadch_map[nSuperLayers][MAX_N_LAYERS][MAX_N_SCELLS]
bad channel mapping
std::string m_innerTrueLRTableFilename
filename for the table which contains the number of true left/right for each pattern in the inner-mos...
std::vector< std::vector< TRGCDCLayer * > > superLayers
structure to hold pointers to all wires in the CDC
bool m_deadchflag
mask Dead channel or not.
The Class for CDC Geometry Parameters.
static CDCGeometryPar & Instance(const CDCGeometry *=nullptr)
Static method to get a reference to the CDCGeometryPar instance.
A Class to store the Monte Carlo particle information.
Definition: MCParticle.h:32
Base class for Modules.
Definition: Module.h:72
void setDescription(const std::string &description)
Sets the description of the module.
Definition: Module.cc:214
void setPropertyFlags(unsigned int propertyFlags)
Sets the flags for the module properties.
Definition: Module.cc:208
@ c_ParallelProcessingCertified
This module can be run in parallel processing mode safely (All I/O must be done through the data stor...
Definition: Module.h:80
Class for type safe access to objects that are referred to in relations.
size_t size() const
Get number of relations.
float weight(int index) const
Get weight with index.
void addRelationTo(const RelationsInterface< BASE > *object, float weight=1.0, const std::string &namedRelation="") const
Add a relation from this object to another object (with caching).
RelationVector< FROM > getRelationsFrom(const std::string &name="", const std::string &namedRelation="") const
Get the relations that point from another store array to this object.
FROM * getRelatedFrom(const std::string &name="", const std::string &namedRelation="") const
Get the object from which this object has a relation.
virtual unsigned short getBackgroundTag() const
Get background tag.
Definition: SimHitBase.h:46
bool isRequired(const std::string &name="")
Ensure this array/object has been registered previously.
Accessor to arrays stored in the data store.
Definition: StoreArray.h:113
bool registerRelationTo(const StoreArray< TO > &toArray, DataStore::EDurability durability=DataStore::c_Event, DataStore::EStoreFlags storeFlags=DataStore::c_WriteOut, const std::string &namedRelation="") const
Register a relation to the given StoreArray.
Definition: StoreArray.h:140
Type-safe access to single objects in the data store.
Definition: StoreObjPtr.h:95
A class to represent a wire in CDC.
Definition: Cell.h:40
A class to represent a cell layer.
Definition: Layer.h:33
A class to represent a wire in CDC.
Definition: Segment.h:39
A class to represent a wire hit in CDC.
Definition: WireHit.h:33
A class to represent a wire in CDC.
Definition: Wire.h:56
A class to represent a digitized signal. Unit is nano second.
Definition: Clock.h:38
A class to represent a digitized signal. Unit is nano second.
Definition: Signal.h:23
A class to represent a signal timing in the trigger system.
Definition: Time.h:25
Class to identify a wire inside the CDC.
Definition: WireID.h:34
void addParam(const std::string &name, T &paramVariable, const std::string &description, const T &defaultValue)
Adds a new parameter to the module.
Definition: Module.h:560
#define REG_MODULE(moduleName)
Register the given module (without 'Module' suffix) with the framework.
Definition: Module.h:650
TRGTime & reverse(void)
reverse edge.
Definition: Time.h:141
const TRGSignal & signal(void) const override
returns an input to the trigger. This is sync'ed to 1GHz clock.
Definition: Wire.h:226
TRGTime & shift(int unit)
delays by clock unit.
Definition: Time.h:163
const TRGCDCWireHit * hit(void) const
returns a pointer to a TRGCDCWireHit.
Definition: Wire.h:144
void initialize(void)
initilize variables.
Definition: Segment.cc:65
unsigned iCDCHit(void) const
returns an index to CDCHit.
Definition: CellHit.h:360
const TRGCDCLayer & layer(void) const
returns a pointer to a layer.
Definition: Cell.h:232
bool active(void) const
returns true if there is a signal.
Definition: Signal.h:277
unsigned nCells(void) const
returns # of cells.
Definition: Layer.h:191
Abstract base class for different kinds of events.