Belle II Software  release-06-02-00
TRGGRLUnpackerModule.h
1 /**************************************************************************
2  * basf2 (Belle II Analysis Software Framework) *
3  * Author: The Belle II Collaboration *
4  * *
5  * See git log for contributors and copyright holders. *
6  * This file is licensed under LGPL-3.0, see LICENSE.md. *
7  **************************************************************************/
8 
9 #ifndef TRGGRLUNPACKER_H
10 #define TRGGRLUNPACKER_H
11 
12 #include <string>
13 #include <vector>
14 
15 #include "rawdata/dataobjects/RawTRG.h"
16 #include "trg/grl/dataobjects/TRGGRLUnpackerStore.h"
17 
18 #include <framework/core/Module.h>
19 #include <framework/datastore/StoreArray.h>
20 #include <framework/datastore/StoreObjPtr.h>
21 
22 namespace Belle2 {
28  namespace TRGGRLUNPACKERSPACE {
29 
31  const int nLeafs = 123 + 3 + 32 + 7;
33  const int nLeafsExtra = 7;
35  const int nClks = 1 ;
37  const int nBits = 2048;
39  const char* LeafNames[nLeafs + nLeafsExtra] = {
40  "2GeV_15",
41  "2GeV_14",
42  "2GeV_13",
43  "2GeV_12",
44  "2GeV_11",
45  "2GeV_10",
46  "2GeV_9",
47  "2GeV_8",
48  "2GeV_7",
49  "2GeV_6",
50  "2GeV_5",
51  "2GeV_4",
52  "2GeV_3",
53  "2GeV_2",
54  "2GeV_1",
55  "2GeV_0",
56  "1GeV_15",
57  "1GeV_14",
58  "1GeV_13",
59  "1GeV_12",
60  "1GeV_11",
61  "1GeV_10",
62  "1GeV_9",
63  "1GeV_8",
64  "1GeV_7",
65  "1GeV_6",
66  "1GeV_5",
67  "1GeV_4",
68  "1GeV_3",
69  "1GeV_2",
70  "1GeV_1",
71  "1GeV_0",
72  "theta_11",
73  "phi_11",
74  "t_11",
75  "E_11",
76  "theta_10",
77  "phi_10",
78  "t_10",
79  "E_10",
80  "theta_9",
81  "phi_9",
82  "t_9",
83  "E_9",
84  "theta_8",
85  "phi_8",
86  "t_8",
87  "E_8",
88  "theta_7",
89  "phi_7",
90  "t_7",
91  "E_7",
92  "theta_6",
93  "phi_6",
94  "t_6",
95  "E_6",
96  "X_1",
97  "N_cluster_1",
98  "ECL_trg_1",
99  "theta_5",
100  "phi_5",
101  "t_5",
102  "E_5",
103  "theta_4",
104  "phi_4",
105  "t_4",
106  "E_4",
107  "theta_3",
108  "phi_3",
109  "t_3",
110  "E_3",
111  "theta_2",
112  "phi_2",
113  "t_2",
114  "E_2",
115  "theta_1",
116  "phi_1",
117  "t_1",
118  "E_1",
119  "theta_0",
120  "phi_0",
121  "t_0",
122  "E_0",
123  "X_0",
124  "N_cluster_0",
125  "ECL_trg_0",
126  "N_track_cut",
127  "N_track_3D",
128  "N_track_NN",
129  "CDCL1_count",
130  "phi_CDC_int_1",
131  "phi_CDC_int_0",
132  "phi_i_int_1",
133  "phi_i_int_0",
134  "N_track",
135  "b2b_1to3",
136  "b2b_1to5",
137  "b2b_1to7",
138  "b2b_1to9",
139  "opening",
140  "samehem_1",
141  "opphem_1",
142  "c_b2b_9_1",
143  "c_b2b_7_1",
144  "c_b2b_5_1",
145  "c_b2b_3_1",
146  "tc_b2b_9_1",
147  "tc_b2b_7_1",
148  "tc_b2b_5_1",
149  "tc_b2b_3_1",
150  "TOPL1_count",
151  "KLML1_count",
152  "sector_KLM_int",
153  "sector_CDC_int",
154  "N_KLMmatch",
155  "samehem_0",
156  "opphem_0",
157  "N_match_2GeV_0",
158  "N_match_0",
159  "N_g_1GeV_0",
160  "N_g_2GeV_0",
161  "ECLL1_count",
162  "c_b2b_9_0",
163  "c_b2b_7_0",
164  "c_b2b_5_0",
165  "c_b2b_3_0",
166  "tc_b2b_9_0",
167  "tc_b2b_7_0",
168  "tc_b2b_5_0",
169  "tc_b2b_3_0",
170  "CDC3DL1_count",
171  "CDCNNL1_count",
172  "slot_CDC_int",
173  "slot_TOP_int",
174  "N_TOPmatch",
175  "N_match_2GeV_1",
176  "N_match_1",
177  "N_g_1GeV_1",
178  "N_g_2GeV_1",
179  "TSFL1_count",
180  "slot64b_TOP_int_1",
181  "slot64b_TOP_int_0",
182  "map_TSF3_int_1",
183  "map_TSF3_int_0",
184  "map_TSF1_int_1",
185  "map_TSF1_int_0",
186  "map_N_ST",
187  "map_ST2_int_1",
188  "map_ST2_int_0",
189  "map_ST_int_1",
190  "map_ST_int_0",
191  "map_veto_int_1",
192  "map_veto_int_0",
193  "map_TSF4_int_1",
194  "map_TSF4_int_0",
195  "map_TSF2_int_1",
196  "map_TSF2_int_0",
197  "map_TSF0_int_1",
198  "map_TSF0_int_0",
199  "charge_flag",
200  "charge_sum",
201  "revoclk",
202  "aaaa",
203  "firmid", "firmver", "evt", "clk", "coml1", "b2ldly", "maxrvc"
204  };
205 
207  enum EBits {
208  e_2GeV_15,
209  e_2GeV_14,
210  e_2GeV_13,
211  e_2GeV_12,
212  e_2GeV_11,
213  e_2GeV_10,
214  e_2GeV_9,
215  e_2GeV_8,
216  e_2GeV_7,
217  e_2GeV_6,
218  e_2GeV_5,
219  e_2GeV_4,
220  e_2GeV_3,
221  e_2GeV_2,
222  e_2GeV_1,
223  e_2GeV_0,
224  e_1GeV_15,
225  e_1GeV_14,
226  e_1GeV_13,
227  e_1GeV_12,
228  e_1GeV_11,
229  e_1GeV_10,
230  e_1GeV_9,
231  e_1GeV_8,
232  e_1GeV_7,
233  e_1GeV_6,
234  e_1GeV_5,
235  e_1GeV_4,
236  e_1GeV_3,
237  e_1GeV_2,
238  e_1GeV_1,
239  e_1GeV_0,
240  e_theta_11,
241  e_phi_11,
242  e_t_11,
243  e_E_11,
244  e_theta_10,
245  e_phi_10,
246  e_t_10,
247  e_E_10,
248  e_theta_9,
249  e_phi_9,
250  e_t_9,
251  e_E_9,
252  e_theta_8,
253  e_phi_8,
254  e_t_8,
255  e_E_8,
256  e_theta_7,
257  e_phi_7,
258  e_t_7,
259  e_E_7,
260  e_theta_6,
261  e_phi_6,
262  e_t_6,
263  e_E_6,
264  e_X_1,
265  e_N_cluster_1,
266  e_ECL_trg_1,
267  e_theta_5,
268  e_phi_5,
269  e_t_5,
270  e_E_5,
271  e_theta_4,
272  e_phi_4,
273  e_t_4,
274  e_E_4,
275  e_theta_3,
276  e_phi_3,
277  e_t_3,
278  e_E_3,
279  e_theta_2,
280  e_phi_2,
281  e_t_2,
282  e_E_2,
283  e_theta_1,
284  e_phi_1,
285  e_t_1,
286  e_E_1,
287  e_theta_0,
288  e_phi_0,
289  e_t_0,
290  e_E_0,
291  e_X_0,
292  e_N_cluster_0,
293  e_ECL_trg_0,
294  e_ECL_trg,
295  e_ECL_trg_delay,
296  e_N_track_cut,
297  e_N_track_NN,
298  e_N_track_3D,
299  e_CDCL1_count,
300  e_phi_CDC_int_1,
301  e_phi_CDC_int_0,
302  e_phi_i_int_1,
303  e_phi_i_int_0,
304  e_N_track,
305  e_b2b_1to3,
306  e_b2b_1to5,
307  e_b2b_1to7,
308  e_b2b_1to9,
309  e_opening,
310  e_samehem_1,
311  e_opphem_1,
312  e_c_b2b_1to9_1,
313  e_c_b2b_1to7_1,
314  e_c_b2b_1to5_1,
315  e_c_b2b_1to3_1,
316  e_tc_b2b_1to9_1,
317  e_tc_b2b_1to7_1,
318  e_tc_b2b_1to5_1,
319  e_tc_b2b_1to3_1,
320  e_TOPL1_count,
321  e_KLML1_count,
322  e_sector_KLM_int,
323  e_sector_CDC_int,
324  e_N_KLMmatch,
325  e_samehem_0,
326  e_opphem_0,
327  e_N_match_2GeV_0,
328  e_N_match_0,
329  e_N_g_1GeV_0,
330  e_N_g_2GeV_0,
331  e_ECLL1_count,
332  e_c_b2b_1to9_0,
333  e_c_b2b_1to7_0,
334  e_c_b2b_1to5_0,
335  e_c_b2b_1to3_0,
336  e_tc_b2b_1to9_0,
337  e_tc_b2b_1to7_0,
338  e_tc_b2b_1to5_0,
339  e_tc_b2b_1to3_0,
340  e_CDC3DL1_count,
341  e_CDCNNL1_count,
342  e_slot_CDC_int,
343  e_slot_TOP_int,
344  e_N_TOPmatch,
345  e_N_match_2GeV_1,
346  e_N_match_1,
347  e_N_g_1GeV_1,
348  e_N_g_2GeV_1,
349  e_TSFL1_count,
350  e_slot64b_TOP_int_1,
351  e_slot64b_TOP_int_0,
352  e_map_TSF3_int_1,
353  e_map_TSF3_int_0,
354  e_map_TSF1_int_1,
355  e_map_TSF1_int_0,
356  e_N_ST,
357  e_map_ST2_int_1,
358  e_map_ST2_int_0,
359  e_map_ST_int_1,
360  e_map_ST_int_0,
361  e_map_veto_int_1,
362  e_map_veto_int_0,
363  e_map_TSF4_int_1,
364  e_map_TSF4_int_0,
365  e_map_TSF2_int_1,
366  e_map_TSF2_int_0,
367  e_map_TSF0_int_1,
368  e_map_TSF0_int_0,
369  e_charge_flag,
370  e_charge_sum,
371  e_revoclk,
372  e_aaaa,
373  e_firmid, e_firmver, e_evt, e_clk, e_coml1, e_b2ldly, e_maxrvc
374  };
375 
377  const int BitMap[nLeafs][2] = {
378 
379  2023, 0, // 2GeV_15
380  2022, 0, // 2GeV_14
381  2021, 0, // 2GeV_13
382  2020, 0, // 2GeV_12
383  2019, 0, // 2GeV_11
384  2018, 0, // 2GeV_10
385  2017, 0, // 2GeV_9
386  2016, 0, // 2GeV_8
387  2015, 0, // 2GeV_7
388  2014, 0, // 2GeV_6
389  2013, 0, // 2GeV_5
390  2012, 0, // 2GeV_4
391  2011, 0, // 2GeV_3
392  2010, 0, // 2GeV_2
393  2009, 0, // 2GeV_1
394  2008, 0, // 2GeV_0
395  2007, 0, // 1GeV_15
396  2006, 0, // 1GeV_14
397  2005, 0, // 1GeV_13
398  2004, 0, // 1GeV_12
399  2003, 0, // 1GeV_11
400  2002, 0, // 1GeV_10
401  2001, 0, // 1GeV_9
402  2000, 0, // 1GeV_8
403  1999, 0, // 1GeV_7
404  1998, 0, // 1GeV_6
405  1997, 0, // 1GeV_5
406  1996, 0, // 1GeV_4
407  1995, 0, // 1GeV_3
408  1994, 0, // 1GeV_2
409  1993, 0, // 1GeV_1
410  1992, 0, // 1GeV_0
411 
412  1671 - 216, 6, // theta_11
413  1664 - 216, 7, // phi_11
414  1656 - 216, 7, // t_11
415  1648 - 216, 11, // E_11
416 
417  1636 - 216, 6, // theta_10
418  1629 - 216, 7, // phi_10
419  1621 - 216, 7, // t_10
420  1613 - 216, 11, // E_10
421 
422  1601 - 216, 6, // theta_9
423  1594 - 216, 7, // phi_9
424  1586 - 216, 7, // t_9
425  1578 - 216, 11, // E_9
426 
427  1566 - 216, 6, // theta_8
428  1559 - 216, 7, // phi_8
429  1551 - 216, 7, // t_8
430  1543 - 216, 11, // E_8
431 
432  1531 - 216, 6, // theta_7
433  1524 - 216, 7, // phi_7
434  1516 - 216, 7, // t_7
435  1508 - 216, 11, // E_7
436 
437  1496 - 216, 6, // theta_6
438  1489 - 216, 7, // phi_6
439  1481 - 216, 7, // t_6
440  1473 - 216, 11, // E_6
441 
442  1461 - 216, 1, // X_1
443  1459 - 216, 2, // N_cluster_1
444  1456 - 216, 0, // ECL_trg_1
445 
446  1671 - 216 * 2, 6, // theta_5
447  1664 - 216 * 2, 7, // phi_5
448  1656 - 216 * 2, 7, // t_5
449  1648 - 216 * 2, 11, // E_5
450 
451  1636 - 216 * 2, 6, // theta_4
452  1629 - 216 * 2, 7, // phi_4
453  1621 - 216 * 2, 7, // t_4
454  1613 - 216 * 2, 11, // E_4
455 
456  1601 - 216 * 2, 6, // theta_3
457  1594 - 216 * 2, 7, // phi_3
458  1586 - 216 * 2, 7, // t_3
459  1578 - 216 * 2, 11, // E_3
460 
461  1566 - 216 * 2, 6, // theta_2
462  1559 - 216 * 2, 7, // phi_2
463  1551 - 216 * 2, 7, // t_2
464  1543 - 216 * 2, 11, // E_2
465 
466  1531 - 216 * 2, 6, // theta_1
467  1524 - 216 * 2, 7, // phi_1
468  1516 - 216 * 2, 7, // t_1
469  1508 - 216 * 2, 11, // E_1
470 
471  1496 - 216 * 2, 6, // theta_0
472  1489 - 216 * 2, 7, // phi_0
473  1481 - 216 * 2, 7, // t_0
474  1473 - 216 * 2, 11, // E_0
475 
476  1461 - 216 * 2, 1, // X_0
477  1459 - 216 * 2, 2, // N_cluster_0
478  1456 - 216 * 2, 0, // ECL_trg_0
479 
480 
481  991, 0, // ECL_trg (991)
482  990, 0, // ECL_trg_delay (990)
483  998, 2, // N_track_cut (998 downto 996)
484  995, 2, // N_track_NN (995 downto 993)
485  992, 2, // N_track_3D (992 downto 990)
486  989, 9, // CDCL1_count (989 downto 980)
487  979, 3, // phi_CDC_int_1 (979 downto 976)
488  975, 31, // phi_CDC_int_0 (975 downto 943)
489  943, 3, // phi_i_int_1 (943 downto 940)
490  939, 31, // phi_i_int_0 (939 downto 908)
491  907, 2, // N_track (907 downto 905)
492  904, 0, // b2b_1to3 (904 downto 904)
493  903, 0, // b2b_1to5 (903 downto 903)
494  902, 0, // b2b_1to7 (902 downto 902)
495  901, 0, // b2b_1to9 (901 downto 901)
496  900, 0, // opening (900 downto 900)
497  899, 0, // samehem_1 (899)
498  898, 0, // opphem_1 (898)
499  897, 0, // c_b2b_1to9_1 (897)
500  896, 0, // c_b2b_1to7_1 (896)
501  895, 0, // c_b2b_1to5_1 (895)
502  894, 0, // c_b2b_1to3_1 (894)
503  893, 0, // tc_b2b_1to9_1 (893)
504  892, 0, // tc_b2b_1to7_1 (892)
505  891, 0, // tc_b2b_1to5_1 (891)
506  890, 0, // tc_b2b_1to3_1 (890)
507  887, 9, // TOPL1_count (887 downto 878)
508  877, 9, // KLML1_count (877 downto 868)
509  867, 7, // sector_KLM_int (867 downto 860)
510  859, 7, // sector_CDC_int (859 downto 852)
511  851, 2, // N_KLMmatch (851 downto 849)
512  848, 0, // samehem_0 (848)
513  847, 0, // opphem_0 (847)
514  846, 2, // N_match_2GeV_0 (846 downto 844)
515  843, 2, // N_match_0 (843 downto 841)
516  840, 2, // N_g_1GeV_0 (840 downto 838)
517  837, 2, // N_g_2GeV_0 (837 downto 835)
518  834, 9, // ECLL1_count (834 downto 825)
519  824, 0, // c_b2b_1to9_0 (824)
520  823, 0, // c_b2b_1to7_0 (823)
521  822, 0, // c_b2b_1to5_0 (822)
522  821, 0, // c_b2b_1to3_0 (821)
523  820, 0, // tc_b2b_1to9_0 (820)
524  819, 0, // tc_b2b_1to7_0 (819)
525  818, 0, // tc_b2b_1to5_0 (818)
526  817, 0, // tc_b2b_1to3_0 (817)
527  816, 9, // CDC3DL1_count (816 downto 807)
528  806, 9, // CDCNNL1_count (806 downto 797)
529  796, 15, // slot_CDC_int
530  780, 15, // slot_TOP_int
531  764, 2, // N_TOPmatch
532  761, 2, // N_match_2GeV_1
533  758, 2, // N_match_1
534  755, 2, // N_g_1GeV_1
535  752, 2, // N_g_2GeV_1
536  749, 9, // TSFL1_count
537  739, 31, // slot64b_TOP_int_1
538  708, 31, // slot64b_TOP_int_0
539  546, 31, // map_TSF3_int_1 (63 downto 32)
540  514, 31, // map_TSF3_int_0 (31 downto 0)
541  482, 31, // map_TSF1_int_1 (63 downto 32)
542  450, 31, // map_TSF1_int_0 (31 downto 0)
543  418, 2, // N_ST
544  415, 31, // map_ST2_int_1 (63 downto 32)
545  383, 31, // map_ST2_int_0 (31 downto 0)
546  351, 31, // map_ST_int_1 (63 downto 32)
547  319, 31, // map_ST_int_0 (31 downto 0)
548  287, 31, // map_veto_int_1 (63 downto 32)
549  255, 31, // map_veto_int_0 (31 downto 0)
550  223, 31, // map_TSF4_int_1 (63 downto 32)
551  191, 31, // map_TSF4_int_0 (31 downto 0)
552  159, 31, // map_TSF2_int_1 (63 downto 32)
553  127, 31, // map_TSF2_int_0 (31 downto 0)
554  95, 31, // map_TSF0_int_1 (63 downto 32)
555  63, 31, // map_TSF0_int_0 (31 downto 0)
556 
557  31, 1, // charge_flag (31 downto 30)
558  29, 2, // charge_sum (31 downto 30)
559 
560  26, 10, // revoclk (26 downto 16)
561  15, 15 // aaaa (15 downto 0)
562  };
563 
564  void
565  setLeafPointersArray(TRGGRLUnpackerStore* store, int** bitArray)
566  {
567  bitArray[e_2GeV_15 ] = &(store->m_2GeV_ECL[15]);
568  bitArray[e_2GeV_14 ] = &(store->m_2GeV_ECL[14]);
569  bitArray[e_2GeV_13 ] = &(store->m_2GeV_ECL[13]);
570  bitArray[e_2GeV_12 ] = &(store->m_2GeV_ECL[12]);
571  bitArray[e_2GeV_11 ] = &(store->m_2GeV_ECL[11]);
572  bitArray[e_2GeV_10 ] = &(store->m_2GeV_ECL[10]);
573  bitArray[e_2GeV_9 ] = &(store->m_2GeV_ECL[9]);
574  bitArray[e_2GeV_8 ] = &(store->m_2GeV_ECL[8]);
575  bitArray[e_2GeV_7 ] = &(store->m_2GeV_ECL[7]);
576  bitArray[e_2GeV_6 ] = &(store->m_2GeV_ECL[6]);
577  bitArray[e_2GeV_5 ] = &(store->m_2GeV_ECL[5]);
578  bitArray[e_2GeV_4 ] = &(store->m_2GeV_ECL[4]);
579  bitArray[e_2GeV_3 ] = &(store->m_2GeV_ECL[3]);
580  bitArray[e_2GeV_2 ] = &(store->m_2GeV_ECL[2]);
581  bitArray[e_2GeV_1 ] = &(store->m_2GeV_ECL[1]);
582  bitArray[e_2GeV_0 ] = &(store->m_2GeV_ECL[0]);
583  bitArray[e_1GeV_15 ] = &(store->m_1GeV_ECL[15]);
584  bitArray[e_1GeV_14 ] = &(store->m_1GeV_ECL[14]);
585  bitArray[e_1GeV_13 ] = &(store->m_1GeV_ECL[13]);
586  bitArray[e_1GeV_12 ] = &(store->m_1GeV_ECL[12]);
587  bitArray[e_1GeV_11 ] = &(store->m_1GeV_ECL[11]);
588  bitArray[e_1GeV_10 ] = &(store->m_1GeV_ECL[10]);
589  bitArray[e_1GeV_9 ] = &(store->m_1GeV_ECL[9]);
590  bitArray[e_1GeV_8 ] = &(store->m_1GeV_ECL[8]);
591  bitArray[e_1GeV_7 ] = &(store->m_1GeV_ECL[7]);
592  bitArray[e_1GeV_6 ] = &(store->m_1GeV_ECL[6]);
593  bitArray[e_1GeV_5 ] = &(store->m_1GeV_ECL[5]);
594  bitArray[e_1GeV_4 ] = &(store->m_1GeV_ECL[4]);
595  bitArray[e_1GeV_3 ] = &(store->m_1GeV_ECL[3]);
596  bitArray[e_1GeV_2 ] = &(store->m_1GeV_ECL[2]);
597  bitArray[e_1GeV_1 ] = &(store->m_1GeV_ECL[1]);
598  bitArray[e_1GeV_0 ] = &(store->m_1GeV_ECL[0]);
599 
600  bitArray[e_theta_11 ] = &(store->m_theta_ECL[11]);
601  bitArray[e_phi_11 ] = &(store->m_phi_ECL[11]);
602  bitArray[e_t_11 ] = &(store->m_t_ECL[11]);
603  bitArray[e_E_11 ] = &(store->m_E_ECL[11]);
604  bitArray[e_theta_10 ] = &(store->m_theta_ECL[10]);
605  bitArray[e_phi_10 ] = &(store->m_phi_ECL[10]);
606  bitArray[e_t_10 ] = &(store->m_t_ECL[10]);
607  bitArray[e_E_10 ] = &(store->m_E_ECL[10]);
608  bitArray[e_theta_9 ] = &(store->m_theta_ECL[9]);
609  bitArray[e_phi_9 ] = &(store->m_phi_ECL[9]);
610  bitArray[e_t_9 ] = &(store->m_t_ECL[9]);
611  bitArray[e_E_9 ] = &(store->m_E_ECL[9]);
612  bitArray[e_theta_8 ] = &(store->m_theta_ECL[8]);
613  bitArray[e_phi_8 ] = &(store->m_phi_ECL[8]);
614  bitArray[e_t_8 ] = &(store->m_t_ECL[8]);
615  bitArray[e_E_8 ] = &(store->m_E_ECL[8]);
616  bitArray[e_theta_7 ] = &(store->m_theta_ECL[7]);
617  bitArray[e_phi_7 ] = &(store->m_phi_ECL[7]);
618  bitArray[e_t_7 ] = &(store->m_t_ECL[7]);
619  bitArray[e_E_7 ] = &(store->m_E_ECL[7]);
620  bitArray[e_theta_6 ] = &(store->m_theta_ECL[6]);
621  bitArray[e_phi_6 ] = &(store->m_phi_ECL[6]);
622  bitArray[e_t_6 ] = &(store->m_t_ECL[6]);
623  bitArray[e_E_6 ] = &(store->m_E_ECL[6]);
624  bitArray[e_X_1 ] = &(store->m_X_1);
625  bitArray[e_N_cluster_1 ] = &(store->m_N_cluster_1);
626  bitArray[e_ECL_trg_1 ] = &(store->m_ECL_trg_1);
627  bitArray[e_theta_5 ] = &(store->m_theta_ECL[5]);
628  bitArray[e_phi_5 ] = &(store->m_phi_ECL[5]);
629  bitArray[e_t_5 ] = &(store->m_t_ECL[5]);
630  bitArray[e_E_5 ] = &(store->m_E_ECL[5]);
631  bitArray[e_theta_4 ] = &(store->m_theta_ECL[4]);
632  bitArray[e_phi_4 ] = &(store->m_phi_ECL[4]);
633  bitArray[e_t_4 ] = &(store->m_t_ECL[4]);
634  bitArray[e_E_4 ] = &(store->m_E_ECL[4]);
635  bitArray[e_theta_3 ] = &(store->m_theta_ECL[3]);
636  bitArray[e_phi_3 ] = &(store->m_phi_ECL[3]);
637  bitArray[e_t_3 ] = &(store->m_t_ECL[3]);
638  bitArray[e_E_3 ] = &(store->m_E_ECL[3]);
639  bitArray[e_theta_2 ] = &(store->m_theta_ECL[2]);
640  bitArray[e_phi_2 ] = &(store->m_phi_ECL[2]);
641  bitArray[e_t_2 ] = &(store->m_t_ECL[2]);
642  bitArray[e_E_2 ] = &(store->m_E_ECL[2]);
643  bitArray[e_theta_1 ] = &(store->m_theta_ECL[1]);
644  bitArray[e_phi_1 ] = &(store->m_phi_ECL[1]);
645  bitArray[e_t_1 ] = &(store->m_t_ECL[1]);
646  bitArray[e_E_1 ] = &(store->m_E_ECL[1]);
647  bitArray[e_theta_0 ] = &(store->m_theta_ECL[0]);
648  bitArray[e_phi_0 ] = &(store->m_phi_ECL[0]);
649  bitArray[e_t_0 ] = &(store->m_t_ECL[0]);
650  bitArray[e_E_0 ] = &(store->m_E_ECL[0]);
651  bitArray[e_X_0 ] = &(store->m_X_0);
652  bitArray[e_N_cluster_0 ] = &(store->m_N_cluster_0);
653  bitArray[e_ECL_trg_0 ] = &(store->m_ECL_trg_0);
654  bitArray[e_ECL_trg ] = &(store->m_ECL_trg);
655  bitArray[e_ECL_trg_delay ] = &(store->m_ECL_trg_delay);
656  bitArray[e_N_track_cut ] = &(store->m_N_track_cut);
657  bitArray[e_N_track_NN ] = &(store->m_N_track_NN);
658  bitArray[e_N_track_3D ] = &(store->m_N_track_3D);
659  bitArray[e_CDCL1_count ] = &(store->m_CDCL1_count);
660  bitArray[e_phi_CDC_int_1 ] = &(store->m_phi_CDC_int[1]);
661  bitArray[e_phi_CDC_int_0 ] = &(store->m_phi_CDC_int[0]);
662  bitArray[e_phi_i_int_1 ] = &(store->m_phi_i_int[1]);
663  bitArray[e_phi_i_int_0 ] = &(store->m_phi_i_int[0]);
664  bitArray[e_N_track ] = &(store->m_N_track);
665  bitArray[e_b2b_1to3 ] = &(store->m_b2b_1to3);
666  bitArray[e_b2b_1to5 ] = &(store->m_b2b_1to5);
667  bitArray[e_b2b_1to7 ] = &(store->m_b2b_1to7);
668  bitArray[e_b2b_1to9 ] = &(store->m_b2b_1to9);
669  bitArray[e_opening ] = &(store->m_opening);
670  bitArray[e_samehem_1 ] = &(store->m_samehem[1]);
671  bitArray[e_opphem_1 ] = &(store->m_opphem[1]);
672  bitArray[e_c_b2b_1to9_1 ] = &(store->m_c_b2b_1to9[1]);
673  bitArray[e_c_b2b_1to7_1 ] = &(store->m_c_b2b_1to7[1]);
674  bitArray[e_c_b2b_1to5_1 ] = &(store->m_c_b2b_1to5[1]);
675  bitArray[e_c_b2b_1to3_1 ] = &(store->m_c_b2b_1to3[1]);
676  bitArray[e_tc_b2b_1to9_1 ] = &(store->m_tc_b2b_1to9[1]);
677  bitArray[e_tc_b2b_1to7_1 ] = &(store->m_tc_b2b_1to7[1]);
678  bitArray[e_tc_b2b_1to5_1 ] = &(store->m_tc_b2b_1to5[1]);
679  bitArray[e_tc_b2b_1to3_1 ] = &(store->m_tc_b2b_1to3[1]);
680  bitArray[e_TOPL1_count ] = &(store->m_TOPL1_count);
681  bitArray[e_KLML1_count ] = &(store->m_KLML1_count);
682  bitArray[e_sector_KLM_int ] = &(store->m_sector_KLM_int);
683  bitArray[e_sector_CDC_int ] = &(store->m_sector_CDC_int);
684  bitArray[e_N_KLMmatch ] = &(store->m_N_KLMmatch);
685  bitArray[e_samehem_0 ] = &(store->m_samehem[0]);
686  bitArray[e_opphem_0 ] = &(store->m_opphem[0]);
687  bitArray[e_N_match_2GeV_0 ] = &(store->m_N_match_2GeV[0]);
688  bitArray[e_N_match_0 ] = &(store->m_N_match[0]);
689  bitArray[e_N_g_1GeV_0 ] = &(store->m_N_g_1GeV[0]);
690  bitArray[e_N_g_2GeV_0 ] = &(store->m_N_g_2GeV[0]);
691  bitArray[e_ECLL1_count ] = &(store->m_ECLL1_count);
692  bitArray[e_c_b2b_1to9_0 ] = &(store->m_c_b2b_1to9[0]);
693  bitArray[e_c_b2b_1to7_0 ] = &(store->m_c_b2b_1to7[0]);
694  bitArray[e_c_b2b_1to5_0 ] = &(store->m_c_b2b_1to5[0]);
695  bitArray[e_c_b2b_1to3_0 ] = &(store->m_c_b2b_1to3[0]);
696  bitArray[e_tc_b2b_1to9_0 ] = &(store->m_tc_b2b_1to9[0]);
697  bitArray[e_tc_b2b_1to7_0 ] = &(store->m_tc_b2b_1to7[0]);
698  bitArray[e_tc_b2b_1to5_0 ] = &(store->m_tc_b2b_1to5[0]);
699  bitArray[e_tc_b2b_1to3_0 ] = &(store->m_tc_b2b_1to3[0]);
700  bitArray[e_CDC3DL1_count ] = &(store->m_CDC3DL1_count);
701  bitArray[e_CDCNNL1_count ] = &(store->m_CDCNNL1_count);
702  bitArray[e_slot_CDC_int ] = &(store->m_slot_CDC_int);
703  bitArray[e_slot_TOP_int ] = &(store->m_slot_TOP_int);
704  bitArray[e_N_TOPmatch ] = &(store->m_N_TOPmatch);
705  bitArray[e_N_match_2GeV_1 ] = &(store->m_N_match_2GeV[1]);
706  bitArray[e_N_match_1 ] = &(store->m_N_match[1]);
707  bitArray[e_N_g_1GeV_1 ] = &(store->m_N_g_1GeV[1]);
708  bitArray[e_N_g_2GeV_1 ] = &(store->m_N_g_2GeV[1]);
709  bitArray[e_TSFL1_count ] = &(store->m_TSFL1_count);
710  bitArray[e_slot64b_TOP_int_1 ] = &(store->m_slot64b_TOP_int_1);
711  bitArray[e_slot64b_TOP_int_0 ] = &(store->m_slot64b_TOP_int_0);
712  bitArray[e_map_TSF3_int_1 ] = &(store->m_map_TSF3_int[1]);
713  bitArray[e_map_TSF3_int_0 ] = &(store->m_map_TSF3_int[0]);
714  bitArray[e_map_TSF1_int_1 ] = &(store->m_map_TSF1_int[1]);
715  bitArray[e_map_TSF1_int_0 ] = &(store->m_map_TSF1_int[0]);
716  bitArray[e_N_ST ] = &(store->m_N_ST);
717  bitArray[e_map_ST2_int_1 ] = &(store->m_map_ST2_int[1]);
718  bitArray[e_map_ST2_int_0 ] = &(store->m_map_ST2_int[0]);
719  bitArray[e_map_ST_int_1 ] = &(store->m_map_ST_int[1]);
720  bitArray[e_map_ST_int_0 ] = &(store->m_map_ST_int[0]);
721  bitArray[e_map_veto_int_1 ] = &(store->m_map_veto_int[1]);
722  bitArray[e_map_veto_int_0 ] = &(store->m_map_veto_int[0]);
723  bitArray[e_map_TSF4_int_1 ] = &(store->m_map_TSF4_int[1]);
724  bitArray[e_map_TSF4_int_0 ] = &(store->m_map_TSF4_int[0]);
725  bitArray[e_map_TSF2_int_1 ] = &(store->m_map_TSF2_int[1]);
726  bitArray[e_map_TSF2_int_0 ] = &(store->m_map_TSF2_int[0]);
727  bitArray[e_map_TSF0_int_1 ] = &(store->m_map_TSF0_int[1]);
728  bitArray[e_map_TSF0_int_0 ] = &(store->m_map_TSF0_int[0]);
729  bitArray[e_charge_flag ] = &(store->m_charge_flag);
730  bitArray[e_charge_sum ] = &(store->m_charge_sum);
731  bitArray[e_revoclk ] = &(store->m_revoclk);
732  bitArray[e_aaaa ] = &(store->m_aaaa);
733  bitArray[e_evt ] = &(store->m_evt);
734  bitArray[e_clk ] = &(store->m_clk);
735  bitArray[e_firmid ] = &(store->m_firmid);
736  bitArray[e_firmver ] = &(store->m_firmver);
737  bitArray[e_coml1 ] = &(store->m_coml1);
738  bitArray[e_b2ldly ] = &(store->m_b2ldly);
739  bitArray[e_maxrvc ] = &(store->m_maxrvc);
740  }
741 
746  class TRGGRLUnpackerModule : public Module {
747 
748  public:
749 
751  TRGGRLUnpackerModule();
752 
754  virtual ~TRGGRLUnpackerModule();
755 
757  virtual void initialize() override;
758 
760  virtual void event() override;
761 
763  virtual void terminate() override;
764 
766  virtual void beginRun() override;
767 
769  virtual void endRun() override;
770 
772  std::string version() const;
773 
775  virtual void fillTreeTRGGRLUnpacker(int* buf, int evt);
776 
777  private:
778 
780  bool m_pciedata;
781 
782  };
783  }
785 } // end namespace Belle2
786 #endif // TRGGRLUNPACKER_H
Belle2::Module
Base class for Modules.
Definition: Module.h:72
Belle2::TRGGRLUNPACKERSPACE::TRGGRLUnpackerModule::initialize
virtual void initialize() override
Initilizes TRGGRLUnpackerUnpackerModule.
Definition: TRGGRLUnpackerModule.cc:41
Belle2::TRGGRLUNPACKERSPACE::TRGGRLUnpackerModule::event
virtual void event() override
Called event by event.
Definition: TRGGRLUnpackerModule.cc:55
Belle2::TRGGRLUNPACKERSPACE::TRGGRLUnpackerModule::endRun
virtual void endRun() override
Called when run ended.
Definition: TRGGRLUnpackerModule.cc:51
Belle2::TRGGRLUNPACKERSPACE::TRGGRLUnpackerModule::terminate
virtual void terminate() override
Called when processing ended.
Definition: TRGGRLUnpackerModule.cc:37
Belle2::TRGGRLUNPACKERSPACE::TRGGRLUnpackerModule::beginRun
virtual void beginRun() override
Called when new run started.
Definition: TRGGRLUnpackerModule.cc:47
Belle2::TRGGRLUNPACKERSPACE::TRGGRLUnpackerModule::version
std::string version() const
returns version of TRGGRLUnpackerModule.
Definition: TRGGRLUnpackerModule.cc:18
Belle2::TRGGRLUNPACKERSPACE::TRGGRLUnpackerModule::fillTreeTRGGRLUnpacker
virtual void fillTreeTRGGRLUnpacker(int *buf, int evt)
Unpacker main function.
Definition: TRGGRLUnpackerModule.cc:91
Belle2
Abstract base class for different kinds of events.
Definition: MillepedeAlgorithm.h:17