Belle II Software  release-08-02-06
trggdlSummaryModule.cc
1 /**************************************************************************
2  * basf2 (Belle II Analysis Software Framework) *
3  * Author: The Belle II Collaboration *
4  * *
5  * See git log for contributors and copyright holders. *
6  * This file is licensed under LGPL-3.0, see LICENSE.md. *
7  **************************************************************************/
8 //---------------------------------------------------------------
9 // $Id$
10 //---------------------------------------------------------------
11 // Filename : trggdlSummaryModule.cc
12 // Section : TRG GDL Summary
13 // Owner :
14 // Email :
15 //---------------------------------------------------------------
16 // Description : A trigger module for TRG GDL
17 //---------------------------------------------------------------
18 // 1.00 : 2017/05/08 : First version
19 //---------------------------------------------------------------
20 #include <trg/gdl/modules/trggdlSummary/trggdlSummaryModule.h>
21 
22 #include <framework/datastore/StoreArray.h>
23 
24 #include <mdst/dataobjects/TRGSummary.h>
25 
26 #include <framework/database/DBObjPtr.h>
27 #include <mdst/dbobjects/TRGGDLDBInputBits.h>
28 #include <mdst/dbobjects/TRGGDLDBFTDLBits.h>
29 
30 #include <string.h>
31 
32 
33 using namespace Belle2;
34 using namespace GDL;
35 
36 REG_MODULE(TRGGDLSummary);
37 
39  : Module::Module()
40 {
41  setDescription("Fill experiment data to TRGSummary");
43  addParam("debugLevel", _debugLevel, "Debug Level", 0);
44  addParam("inputBitsWithPSNMTiming", e_inBitsWithPSNMTiming, "List of input bits to judge triggering with the PSNM timings.", {"passive_veto", "cdc_veto", "ecl_veto", "cdcecl_veto", "injv", "veto"});
45  addParam("outputBitsWithPSNMTiming", e_outBitsWithPSNMTiming, "List of output bits to judge triggering with the PSNM timings.", {});
46 }
47 
49 {
50 
51  if (_debugLevel > 9) printf("TRGGDLSummaryModule::initialize() start\n");
52 
53  GDLResult.registerInDataStore();
54  for (int i = 0; i < 320; i++) {
55  LeafBitMap[i] = m_unpacker->getLeafMap(i);
56  }
57  for (int i = 0; i < 320; i++) {
58  strcpy(LeafNames[i], m_unpacker->getLeafnames(i));
59  }
60 
61  _e_timtype = 0;
62  _e_rvcout = 0;
63  for (int i = 0; i < 10; i++) {
64  ee_psn[i] = 0;
65  ee_ftd[i] = 0;
66  ee_itd[i] = 0;
67  }
68  for (int i = 0; i < 320; i++) {
69  if (strcmp(LeafNames[i], "timtype") == 0)_e_timtype = LeafBitMap[i];
70  if (strcmp(LeafNames[i], "rvcout") == 0) _e_rvcout = LeafBitMap[i];
71  if (strcmp(LeafNames[i], "psn0") == 0) ee_psn[0] = LeafBitMap[i];
72  if (strcmp(LeafNames[i], "psn1") == 0) ee_psn[1] = LeafBitMap[i];
73  if (strcmp(LeafNames[i], "psn2") == 0) ee_psn[2] = LeafBitMap[i];
74  if (strcmp(LeafNames[i], "psn3") == 0) ee_psn[3] = LeafBitMap[i];
75  if (strcmp(LeafNames[i], "psn4") == 0) ee_psn[4] = LeafBitMap[i];
76  if (strcmp(LeafNames[i], "psn5") == 0) ee_psn[5] = LeafBitMap[i];
77  if (strcmp(LeafNames[i], "psn6") == 0) ee_psn[6] = LeafBitMap[i];
78  if (strcmp(LeafNames[i], "psn7") == 0) ee_psn[7] = LeafBitMap[i];
79  if (strcmp(LeafNames[i], "psn8") == 0) ee_psn[8] = LeafBitMap[i];
80  if (strcmp(LeafNames[i], "psn9") == 0) ee_psn[9] = LeafBitMap[i];
81  if (strcmp(LeafNames[i], "ftd0") == 0) ee_ftd[0] = LeafBitMap[i];
82  if (strcmp(LeafNames[i], "ftd1") == 0) ee_ftd[1] = LeafBitMap[i];
83  if (strcmp(LeafNames[i], "ftd2") == 0) ee_ftd[2] = LeafBitMap[i];
84  if (strcmp(LeafNames[i], "ftd3") == 0) ee_ftd[3] = LeafBitMap[i];
85  if (strcmp(LeafNames[i], "ftd4") == 0) ee_ftd[4] = LeafBitMap[i];
86  if (strcmp(LeafNames[i], "ftd5") == 0) ee_ftd[5] = LeafBitMap[i];
87  if (strcmp(LeafNames[i], "ftd6") == 0) ee_ftd[6] = LeafBitMap[i];
88  if (strcmp(LeafNames[i], "ftd7") == 0) ee_ftd[7] = LeafBitMap[i];
89  if (strcmp(LeafNames[i], "ftd8") == 0) ee_ftd[8] = LeafBitMap[i];
90  if (strcmp(LeafNames[i], "ftd9") == 0) ee_ftd[9] = LeafBitMap[i];
91  if (strcmp(LeafNames[i], "itd0") == 0) ee_itd[0] = LeafBitMap[i];
92  if (strcmp(LeafNames[i], "itd1") == 0) ee_itd[1] = LeafBitMap[i];
93  if (strcmp(LeafNames[i], "itd2") == 0) ee_itd[2] = LeafBitMap[i];
94  if (strcmp(LeafNames[i], "itd3") == 0) ee_itd[3] = LeafBitMap[i];
95  if (strcmp(LeafNames[i], "itd4") == 0) ee_itd[4] = LeafBitMap[i];
96  if (strcmp(LeafNames[i], "itd5") == 0) ee_itd[5] = LeafBitMap[i];
97  if (strcmp(LeafNames[i], "itd6") == 0) ee_itd[6] = LeafBitMap[i];
98  if (strcmp(LeafNames[i], "itd7") == 0) ee_itd[7] = LeafBitMap[i];
99  if (strcmp(LeafNames[i], "itd8") == 0) ee_itd[8] = LeafBitMap[i];
100  if (strcmp(LeafNames[i], "itd9") == 0) ee_itd[9] = LeafBitMap[i];
101  }
102 
103  maskInitialized = false;
104 
105  if (_debugLevel > 9) printf("TRGGDLSummaryModule::initialize() end\n");
106 }
107 
109 {
110 
111  if (_debugLevel > 9) printf("TRGGDLSummaryModule::event() start\n");
112 
113  int n_leafs = 0;
114  n_leafs = m_unpacker->getnLeafs();
115  int n_leafsExtra = 0;
116  n_leafsExtra = m_unpacker->getnLeafsExtra();
117  int n_clocks = m_unpacker->getnClks();
118  int nconf = m_unpacker->getconf();
119  int nword_input = m_unpacker->get_nword_input();
120  int nword_output = m_unpacker->get_nword_output();
121 
122  if (_debugLevel > 89)
123  printf("trggdlSummaryModule:n_leafs(%d), n_leafsExtra(%d), n_clocks(%d), nconf(%d), nword_input(%d), nword_output(%d)\n",
124  n_leafs, n_leafsExtra, n_clocks, nconf, nword_input, nword_output);
125 
127  if (!entAry || !entAry.getEntries()) return;
128 
129  //prepare entAry adress
130  int clk_map = 0;
131  for (int i = 0; i < 320; i++) {
132  if (strcmp(entAry[0]->m_unpackername[i], "clk") == 0) clk_map = i;
133  }
134  if (_debugLevel > 89)
135  printf("trggdlSummaryModule:clk_map(%d)\n", clk_map);
136 
137  std::vector<std::vector<int> > _data(n_leafs + n_leafsExtra);
138  for (int leaf = 0; leaf < n_leafs + n_leafsExtra; leaf++) {
139  std::vector<int> _v(n_clocks);
140  _data[leaf] = _v;
141  }
142 
143  // fill "bit vs clk" for the event
144  for (int ii = 0; ii < entAry.getEntries(); ii++) {
145  if (_debugLevel > 89)
146  printf("trggdlSummaryModule:a:ii(%d)\n", ii);
147  std::vector<int*> Bits(n_leafs + n_leafsExtra);
148  //set pointer
149  for (int i = 0; i < 320; i++) {
150  if (LeafBitMap[i] != -1) {
151  Bits[LeafBitMap[i]] = &(entAry[ii]->m_unpacker[i]);
152  if (_debugLevel > 89)
153  printf("trggdlSummaryModule:ab:i(%d), LeafBitMap[i](%d), *Bits[LeafBitMap[i]](%d)\n",
154  i, LeafBitMap[i], *Bits[LeafBitMap[i]]);
155  } else {
156  if (_debugLevel > 89)
157  printf("trggdlSummaryModule:ab:i(%d), LeafBitMap[i](%d)\n",
158  i, LeafBitMap[i]);
159  }
160  }
161  for (int leaf = 0; leaf < n_leafs + n_leafsExtra; leaf++) {
162  if (_debugLevel > 89)
163  printf("trggdlSummaryModule:ad:leaf(%d),ii(%d),clk_map(%d),*Bits[leaf](%d), entAry[ii]->m_unpacker[clk_map](%d)\n",
164  leaf, ii, clk_map, *Bits[leaf], entAry[ii]->m_unpacker[clk_map]);
165  _data[leaf][entAry[ii]->m_unpacker[clk_map]] = *Bits[leaf];
166  }
167  }
168 
169  GDLResult.create(true);
170 
171  if (!maskInitialized) {
172  maskInitialized = true;
173  for (unsigned int i = 0; i < TRGSummary::c_ntrgWords; i++) {
174  e_inBitWPTMasks[i] = 0;
175  e_outBitWPTMasks[i] = 0;
176  }
177 
178  for (const auto& nowbn : e_inBitsWithPSNMTiming) {
179  unsigned int nowbit;
180  try {
181  nowbit = GDLResult->getInputBitNumber(nowbn);
182  } catch (std::invalid_argument& e) {
183  B2WARNING("The input bitname '" << nowbn << "' is not in the input bitname list! This bitname will be skipped!");
184  continue;
185  };
186  int iWord = nowbit / TRGSummary::c_trgWordSize;
187  int iBit = nowbit % TRGSummary::c_trgWordSize;
188 
189  e_inBitWPTMasks[iWord] |= (1u << iBit);
190  }
191 
192  for (const auto& nowbn : e_outBitsWithPSNMTiming) {
193  unsigned int nowbit;
194  try {
195  nowbit = GDLResult->getOutputBitNumber(nowbn);
196  } catch (std::invalid_argument& e) {
197  B2WARNING("The output bitname '" << nowbn << "' is not in the FTDL bitname list! This bitname will be skipped!");
198  continue;
199  };
200  int iWord = nowbit / TRGSummary::c_trgWordSize;
201  int iBit = nowbit % TRGSummary::c_trgWordSize;
202 
203  e_outBitWPTMasks[iWord] |= (1u << iBit);
204  }
205  }
206 
207  // reg_tmdl_timtype in header. 3bit, no quality info.
208  GDL::EGDLTimingType gtt = (GDL::EGDLTimingType)_data[_e_timtype][0];
209  unsigned int ored = 0;
210 
211  int psnmClk = n_clocks;
212  int l1timstart, l1timend;
213  bool l1timfound;
214  switch (gtt) {
215  case GDL::e_tt_top:
216  case GDL::e_tt_ecl:
217  case GDL::e_tt_cdc:
218  l1timfound = true;
219  l1timstart = 8;
220  l1timend = 25;
221  break;
222  default:
223  l1timfound = false;
224  l1timstart = n_clocks;
225  l1timend = n_clocks;
226  break;
227  }
228 
229  for (int j = 0; j < (int)nword_input; j++) {
230  if (_debugLevel > 89) printf("b:j(%d),", j);
231  ored = 0;
232  for (int clk = 0; clk < n_clocks; clk++) {
233  if (_debugLevel > 89) printf("clk(%d),", clk);
234  ored |= _data[ee_itd[j]][clk];
235  }
236  GDLResult->setInputBits(j, ored);
237  if (_debugLevel > 89) printf("\n");
238  }
239 
240  if (nconf == 0) {
241  ored = 0;
242  for (int clk = 0; clk < n_clocks; clk++) {
243  ored |= _data[ee_ftd[0]][clk];
244  }
245  GDLResult->setFtdlBits(0, ored);
246 
247  ored = 0;
248  for (int clk = 0; clk < n_clocks; clk++) {
249  ored |= (_data[ee_ftd[2]][clk] << 16) + _data[ee_ftd[1]][clk];
250  }
251  GDLResult->setFtdlBits(1, ored);
252 
253  ored = 0;
254  for (int clk = 0; clk < n_clocks; clk++) {
255  ored |= _data[ee_psn[0]][clk];
256  }
257  GDLResult->setPsnmBits(0, ored);
258 
259  ored = 0;
260  for (int clk = l1timstart; ored == 0 && clk < l1timend; clk++) {
261  ored |= _data[ee_psn[0]][clk];
262  if (ored != 0) psnmClk = std::min(clk, psnmClk);
263  }
264 
265  ored = 0;
266  for (int clk = 0; clk < n_clocks; clk++) {
267  ored |= (_data[ee_psn[2]][clk] << 16) + _data[ee_psn[1]][clk];
268  }
269  GDLResult->setPsnmBits(1, ored);
270 
271  ored = 0;
272  for (int clk = l1timstart; ored == 0 && clk < l1timend; clk++) {
273  ored |= (_data[ee_psn[2]][clk] << 16) + _data[ee_psn[1]][clk];
274  if (ored != 0) psnmClk = std::min(clk, psnmClk);
275  }
276  } else {
277  for (int j = 0; j < (int)nword_output; j++) {
278  ored = 0;
279  for (int clk = 0; clk < n_clocks; clk++) {
280  ored |= _data[ee_ftd[j]][clk];
281  }
282  GDLResult->setFtdlBits(j, ored);
283  }
284 
285  for (int j = 0; j < (int)nword_output; j++) {
286  ored = 0;
287  for (int clk = 0; clk < n_clocks; clk++) {
288  ored |= _data[ee_psn[j]][clk];
289  }
290  GDLResult->setPsnmBits(j, ored);
291 
292  ored = 0;
293  for (int clk = l1timstart; ored == 0 && clk < l1timend; clk++) {
294  ored |= _data[ee_psn[j]][clk];
295  if (ored != 0) psnmClk = std::min(clk, psnmClk);
296  }
297  }
298  }
299 
300  if (psnmClk <= 0) psnmClk = 1;
301 
302  if (l1timfound && psnmClk < 32) {
303  for (int i = 0; i < nword_input; i++) {
304  unsigned int nowmask = e_inBitWPTMasks[i];
305  if (nowmask == 0) continue;
306  else ored = nowmask;
307 
308  for (int clk = psnmClk - 1; ored != 0 && clk <= psnmClk; clk++)
309  ored &= (_data[ee_itd[i]][clk] & nowmask);
310 
311  if (ored != nowmask) {
312  unsigned int ibits = GDLResult->getInputBits(i);
313  unsigned int result_mask = ~nowmask | ored;
314  GDLResult->setInputBits(i, ibits & result_mask);
315  }
316  }
317 
318  for (int i = 0; i < nword_output; i++) {
319  unsigned int nowmask = e_outBitWPTMasks[i];
320  if (nowmask == 0) continue;
321  else ored = nowmask;
322 
323  for (int clk = psnmClk - 1; ored != 0 && clk <= psnmClk; clk++)
324  ored &= (_data[ee_ftd[i]][clk] & nowmask);
325 
326  if (ored != nowmask) {
327  unsigned int fbits = GDLResult->getFtdlBits(i);
328  unsigned int result_mask = ~nowmask | ored;
329  GDLResult->setFtdlBits(i, fbits & result_mask);
330  }
331  }
332  }
333 
334  //get prescales
335  for (int i = 0; i < 320; i++) {
336  int bit1 = i / 32;
337  int bit2 = i % 32;
338  GDLResult->setPreScale(bit1, bit2, m_prescales->getprescales(i));
339  }
340 
342  if (gtt == GDL::e_tt_cdc) {
344  } else if (gtt == GDL::e_tt_ecl) {
346  } else if (gtt == GDL::e_tt_top) {
348  } else if (gtt == GDL::e_tt_dphy) {
350  } else if (gtt == GDL::e_tt_rand) {
352  } else if (gtt == GDL::e_tt_psnm) {
354  } else {
356  }
357 
359  unsigned _exp = bevt->getExperiment();
360  unsigned _run = bevt->getRun();
361  unsigned exprun = _exp * 1000000 + _run;
362  if (exprun < 13000500) {
363  GDLResult->setTimQuality(TRGSummary::TTYQ_CORS); // coarse
364  } else {
365  int rvcout = _data[_e_rvcout][0];
366  int q = (rvcout >> 1) & 3;
367  TRGSummary::ETimingQuality timQuality = TRGSummary::TTYQ_NONE;
368  switch (q) {
369  case 1:
370  timQuality = TRGSummary::TTYQ_CORS;
371  break;
372  case 2:
373  timQuality = TRGSummary::TTYQ_FINE;
374  break;
375  case 3:
376  timQuality = TRGSummary::TTYQ_SFIN;
377  break;
378  default:
379  timQuality = TRGSummary::TTYQ_NONE;
380  break;
381  }
382  GDLResult->setTimQuality(timQuality);
383  }
384 
385  if (exprun > 16000271) {
386  if (tt == TRGSummary::TTYP_RAND) {
387  int i_poissonin = GDLResult->getInputBitNumber(std::string("poissonin"));
388  int j_poissonin = i_poissonin / TRGSummary::c_trgWordSize;
389  int k_poissonin = i_poissonin % TRGSummary::c_trgWordSize;
390  int i_veto = GDLResult->getInputBitNumber(std::string("veto"));
391  int j_veto = i_veto / TRGSummary::c_trgWordSize;
392  int k_veto = i_veto % TRGSummary::c_trgWordSize;
393  for (int clk = 5; clk < n_clocks - 5; clk++) {
394  if ((1 << k_poissonin) & _data[ee_itd[j_poissonin]][clk]) {
396  if ((1 << k_veto) & _data[ee_itd[j_veto]][clk]) {
397  GDLResult->setPoissonInInjectionVeto();
398  }
399  }
400  }
401  }
402  }
403  GDLResult->setTimType(tt);
404 }
Base class for Modules.
Definition: Module.h:72
void setDescription(const std::string &description)
Sets the description of the module.
Definition: Module.cc:214
void setPropertyFlags(unsigned int propertyFlags)
Sets the flags for the module properties.
Definition: Module.cc:208
@ c_ParallelProcessingCertified
This module can be run in parallel processing mode safely (All I/O must be done through the data stor...
Definition: Module.h:80
Accessor to arrays stored in the data store.
Definition: StoreArray.h:113
int getEntries() const
Get the number of objects in the array.
Definition: StoreArray.h:216
Type-safe access to single objects in the data store.
Definition: StoreObjPtr.h:96
virtual void initialize() override
initialize
virtual void event() override
Event.
StoreObjPtr< TRGSummary > GDLResult
output for TRGSummary
static const unsigned int c_trgWordSize
size of a l1 trigger word
Definition: TRGSummary.h:37
ETimingType
types of trigger timing source defined in b2tt firmware
Definition: TRGSummary.h:43
@ TTYP_DPHY
delayed physics events for background
Definition: TRGSummary.h:65
@ TTYP_SELF
events triggered by self trigger
Definition: TRGSummary.h:53
@ TTYP_POIS
poisson random trigger
Definition: TRGSummary.h:73
@ TTYP_NONE
reserved (not defined yet)
Definition: TRGSummary.h:75
@ TTYP_TOP
events triggered by TOP timing
Definition: TRGSummary.h:61
@ TTYP_CDC
events triggered by CDC timing
Definition: TRGSummary.h:63
@ TTYP_ECL
events triggered by ECL timing
Definition: TRGSummary.h:45
@ TTYP_RAND
random trigger events
Definition: TRGSummary.h:67
static const unsigned int c_ntrgWords
number of l1 trigger words
Definition: TRGSummary.h:40
ETimingQuality
trigger timing type quality
Definition: TRGSummary.h:79
REG_MODULE(arichBtest)
Register the Module.
void addParam(const std::string &name, T &paramVariable, const std::string &description, const T &defaultValue)
Adds a new parameter to the module.
Definition: Module.h:560
Abstract base class for different kinds of events.