9#ifndef CDCTRIGGERUNPACKERMODULE_H
10#define CDCTRIGGERUNPACKERMODULE_H
12#include <framework/core/Module.h>
13#include <rawdata/dataobjects/RawTRG.h>
14#include <framework/datastore/StoreArray.h>
15#include <framework/datastore/StoreObjPtr.h>
16#include <framework/database/DBObjPtr.h>
18#include <trg/cdc/dataobjects/Bitstream.h>
19#include <trg/cdc/Unpacker.h>
20#include <trg/cdc/dataobjects/CDCTriggerTrack.h>
21#include <trg/cdc/dataobjects/CDCTriggerSegmentHit.h>
22#include <trg/cdc/dataobjects/CDCTriggerFinderClone.h>
23#include <trg/cdc/dataobjects/CDCTriggerMLPInput.h>
24#include <trg/cdc/dbobjects/CDCTrigger2DConfig.h>
25#include <trg/cdc/dataobjects/CDCTriggerMLP.h>
26#include <trg/cdc/dbobjects/CDCTriggerNeuroConfig.h>
27#include <framework/dataobjects/BinnedEventT0.h>
42 using NodeList = std::vector<std::vector<int> >;
61 unsigned inEventWidth,
unsigned inOffset,
62 int inHeaderSize,
const std::vector<int>& inNodeID,
const std::vector<int>& inNodeID_pcie40,
63 int& inDelay,
int& inCnttrg,
int inDebugLevel = 0) :
105 virtual void reserve(
int, std::array<int, nFinesse>,
bool) {};
111 std::array<int*, nFinesse>,
112 std::array<int, nFinesse>,
129 std::array<int*, 48> data32tab,
130 std::array<int, 48> nWords,
144 if (subDetectorId != iNode_i) {
150 B2WARNING(
"The module " <<
name <<
" does not have enough data (" <<
151 nWords[iFinesse_i] <<
"). Nothing will be unpacked.");
153 }
else if (nWords[iFinesse_i] ==
headerSize) {
154 B2DEBUG(20,
"The module " <<
name <<
155 " contains only the header. Nothing will be unpacked.");
167 long dataHeader = (data32tab.at(iFinesse_i)[
headerSize] & 0xffff0000);
168 if (dataHeader != 0xdddd0000) {
169 B2DEBUG(30,
"The module " <<
name <<
" has an event data header " << std::hex << std::setfill(
'0') << std::setw(4) <<
170 (dataHeader >> 16) <<
171 " in this event. It will be ignore.");
174 B2DEBUG(50,
"subdet and head size " << std::setfill(
'0') << std::hex << std::setw(8) << iNode_i <<
", " << std::dec << std::setw(
175 0) << nWords[iFinesse_i] <<
176 " : " << std::hex << std::setw(8) << data32tab.at(iFinesse_i)[0] <<
" " << data32tab.at(iFinesse_i)[1] <<
" " << data32tab.at(
178 " " << data32tab.at(iFinesse_i)[3] <<
" dataheader = " << dataHeader);
189 firmwareType = CDCTriggerUnpacker::rawIntToAscii(data32tab.at(iFinesse_i)[0]);
190 firmwareVersion = CDCTriggerUnpacker::rawIntToString(data32tab.at(iFinesse_i)[1]);
195 std::bitset<wordWidth> thirdWord(data32tab.at(iFinesse_i)[2]);
196 l1_revoclk = CDCTriggerUnpacker::subset<32, 0, 11>(thirdWord).to_ulong();
202 int newCnttrg = CDCTriggerUnpacker::subset<32, 12, 31>(thirdWord).to_ulong();
206 int newDelay = CDCTriggerUnpacker::subset<32, 12, 20>
207 (thirdWord).to_ulong();
209 B2WARNING(
" the Belle2Link delay for " <<
name <<
210 "has changed from " <<
delay <<
" to " << newDelay <<
"!");
219 ", finesse " << iFinesse_i <<
", delay: " <<
delay <<
220 ", cnttrg: " <<
cnttrg << std::dec <<
" == " <<
cnttrg <<
", L1_revoclk " << l1_revoclk);
259 void event()
override;
265 static constexpr std::array<int, 9>
nMergers = {10, 10, 12, 14, 16, 18, 20, 22, 24};
Class to keep all parameters of an expert MLP for the neuro trigger.
Unpack the trigger data recorded in B2L.
static constexpr std::array< int, 9 > nMergers
data width of a single merger unit
CDCTriggerMLP m_mlp_scale
fake object to assign the user set scaling values to
int m_debugLevel
debug level specified in the steering file
StoreArray< RawTRG > m_rawTriggers
array containing the raw trigger data object
bool m_pciedata
PCIe40 data or copper data.
NodeList m_tracker2DNodeID_pcie40
list of (PCIe40 ID, ch ID) of 2D tracker
DBObjPtr< CDCTriggerNeuroConfig > m_cdctriggerneuroconfig
current neurotrigger config from database; used for unscaling network target
std::vector< float > m_NNOutputScale
output scale for the neural network output
int m_headerSize
number of words (number of bits / 32) of the B2L header
int m_mergerDelay
Belle2Link delay of the merger reader.
bool m_sim13dt
bool value wether to simulate 13 bit drift time by using 2dcc
StoreArray< MergerBits > m_mergerBits
merger output bitstream
StoreArray< CDCTriggerMLPInput > m_NeuroInputs
decoded input vector for neural network
int m_NeuroCnttrg
NN cnttrg.
void initialize() override
Register input and output data.
int m_NeuroDelay
Belle2Link delay of the neurotrigger.
void event() override
convert raw data (in B2L buffer to bitstream)
std::vector< int > m_delayNNOutput
delay of the NN output values clock cycle after the NN enable bit (by quadrant)
std::vector< float > unscaleNNOutput(std::vector< float > input) const
small function to rescale the NN output from -1, 1 to output scale
NodeList m_neuroNodeID
list of (COPPER ID, HSLB ID) of neurotrigger
StoreArray< CDCTriggerUnpacker::T2DOutputBitStream > m_bits2DTo3D
bitstream of 2D output to 3D/Neuro
bool m_decodeNeuro
flag to decode neurotrigger data
void terminate() override
Delete dynamically allocated variables.
int m_2DFinderDelay
Belle2Link delay of the 2D finder.
StoreArray< CDCTriggerSegmentHit > m_TSHits
decoded track segment hit
bool m_alignFoundTime
flag to align found time in different sub-modules
bool m_unpackTracker2D
flag to unpack 2D tracker data
CDCTriggerUnpackerModule()
Constructor: Sets the description, the properties and the parameters of the module.
NodeList m_tracker2DNodeID
list of (COPPER ID, HSLB ID) of 2D tracker
StoreArray< CDCTriggerSegmentHit > m_NNInputTSHitsAll
all decoded stereo track segment hits from the neural network input
StoreArray< CDCTriggerTrack > m_2DFinderTracks
decoded 2D finder track
void beginRun() override
begin Run
bool m_decodeTSHit
flag to decode track segment
StoreArray< CDCTriggerTrack > m_NeuroTracks
decoded Neuro tracks
StoreArray< CDCTriggerTrack > m_NNInput2DFinderTracks
decoded 2D finder tracks from the neural network input
int m_2DFinderCnttrg
2D cnttrg
StoreObjPtr< BinnedEventT0 > m_ETFTime
store object for unpacked etf event time from neuro b2link
bool m_decode2DFinderInputTS
flag to decode 2D finder input TS
NodeList m_neuroNodeID_pcie40
list of (PCIe40 ID, ch ID) of neurotrigger
StoreArray< CDCTriggerUnpacker::NNBitStream > m_bitsNN
bitstream of Neuro input and output (including intermediate results)
MergerBits m_mergerBitsPerClock
Merger bits per clock.
NodeList m_mergerNodeID
list of (COPPER ID, HSLB ID) of Merger reader (TSF)
std::vector< int > m_delayNNSelect
delay of the NN selected TS clock cycle after the NN enable bit (by quadrant)
StoreArray< CDCTriggerFinderClone > m_2DFinderClones
additional information of the 2D finder track
StoreArray< CDCTriggerUnpacker::TSFOutputBitStream > m_bitsTo2D
bitstream of TSF output to 2D tracker
StoreArray< CDCTriggerSegmentHit > m_NNInputTSHits
decoded track segment hits from the neural network input
bool m_unpackNeuro
flag to unpack neurotrigger data
std::vector< SubTrigger * > m_subTrigger
vector holding the pointers to all the dynamically allocated SubTriggers
bool m_decode2DFinderTrack
flag to decode 2D finder track
bool m_useDB
bool value for wether to use the conditions database
bool m_unpackMerger
flag to unpack merger data (recorded by Merger Reader / TSF)
Class for accessing objects in the database.
Accessor to arrays stored in the data store.
Type-safe access to single objects in the data store.
static constexpr int wordWidth
width of a single word in the raw int buffer
std::array< std::bitset< mergerWidth >, nAllMergers > MergerBus
Merger data bus.
static constexpr int nFinesse
Number of FINESSE in a PCIe40.
static constexpr int mergerWidth
Merger data width.
std::vector< std::vector< int > > NodeList
Node list.
static constexpr int nAllMergers
Number of Mergers.
Abstract base class for different kinds of events.
enum class SubTriggerType : unsigned char {Merger, TSF, T2D, T3D, Neuro, ETF};
int iNode_pcie40
PCIe40 id of the board.
virtual void unpack(int, std::array< int *, nFinesse >, std::array< int, nFinesse >, bool)
Unpack the Belle2Link data and fill the Bitstream.
int headerSize
Size of the B2L header in words.
unsigned offset
The starting point of the data in an event.
virtual int getHeaders(int subDetectorId, std::array< int *, 48 > data32tab, std::array< int, 48 > nWords, bool pciedata)
Get the Belle2Link header information.
int debugLevel
debug level in the steering file
virtual ~SubTrigger()
destructor
SubTrigger(const std::string &inName, unsigned inEventWidth, unsigned inOffset, int inHeaderSize, const std::vector< int > &inNodeID, const std::vector< int > &inNodeID_pcie40, int &inDelay, int &inCnttrg, int inDebugLevel=0)
constructor
std::string firmwareVersion
version of the FPGA firmware
std::string firmwareType
type of the FPGA firmware
int iFinesse
FINESSE (HSLB) id) of the board.
int & delay
Reference to the variable of its Belle2Link delay.
int iFinesse_pcie40
PCIe40 ch id of the board.
int & cnttrg
counter of trgger signal, total 32 bits, the 20 LSBs recorded in the event header
std::string name
Name of the UT3.
unsigned eventWidth
Size of an event in the Belle2Link data in 32-bit words.
int iNode
COPPER id of the board.
virtual void reserve(int, std::array< int, nFinesse >, bool)
Calculate the number of clocks in the data, reserve that much of clocks in the Bitstream(s)