Cosim Namespace Reference

Helper class for software (C++) / firmware (VHDL) co-simulation. More...

Functions
std::string	display_value (const char *count, int size)
	Display value of the signal.
template<size_t N>
std::string	slv_to_bin_string (std::array< char, N > signal, bool padding=false)
	Transform into string.
template<size_t N>
void	display_hex (const std::array< char, N > &signal)
	Display signal in hex.
template<size_t N>
void	display_nonzero_hex (const std::array< char, N > &signal)
	Display nonzero value of signal in hex.
template<size_t nbits, size_t min, size_t max>
std::bitset< max - min+1 >	subset (std::bitset< nbits > set)
	extract a subset of bitstring, like substring.

Variables
const char *	std_logic_literal [] = {"U", "X", "0", "1", "Z", "W", "L", "H", "-"}
	In case you are not familiar with VHDL simulation, there are 9 possible values defined for the standard logic type, instead of just 0 and 1.
const char	one_val = 3
	'1' in XSI VHDL simulation
const char	zero_val = 2
	'0' in XSI VHDL simulation

Detailed Description

Helper class for software (C++) / firmware (VHDL) co-simulation.

Function Documentation

display_hex()

void display_hex

(

const std::array< char, N > &

signal

)

Display signal in hex.

Definition at line 81 of file Cosim.h.

  {
    std::ios oldState(nullptr);
    oldState.copyfmt(std::cout);
    if (std::any_of(signal.begin(), signal.end(), [](char i)
    {return i != zero_val && i != one_val;})) {
      B2WARNING("Some bit in the signal vector is neither 0 nor 1. \n" <<
                "Displaying binary values instead.");
      std::cout << slv_to_bin_string(signal) << std::endl;
    } else {
      std::string binString = slv_to_bin_string(signal, true);
      std::cout << std::setfill('0');
      for (unsigned i = 0; i < signal.size(); i += 4) {
        std::bitset<4> set(binString.substr(i, 4));
        std::cout << std::setw(1) << std::hex << set.to_ulong();
      }
    }
    std::cout << "\n";
    std::cout.copyfmt(oldState);
  }

display_nonzero_hex()

void display_nonzero_hex

(

const std::array< char, N > &

signal

)

Display nonzero value of signal in hex.

Definition at line 104 of file Cosim.h.

  {
    if (std::any_of(signal.begin(), signal.end(), [](char i)
    {return i != zero_val;})) {
      display_hex(signal);
    }
  }

display_value()

std::string display_value	(	const char *	count,
		int	size
	)

Display value of the signal.

Definition at line 48 of file Cosim.h.

  {
    std::string res;
    for (int i = 0; i < size; i++) {
      if (count[i] >= 0 && count[i] < 9) {
        res += std_logic_literal[(int) count[i]];
      } else {
        B2WARNING("invalid signal detected: " << static_cast<int>(count[i]));
        res += "?";
      }
    }
    return res;
  }

slv_to_bin_string()

std::string slv_to_bin_string	(	std::array< char, N >	signal,
		bool	padding = false
	)

Transform into string.

Definition at line 64 of file Cosim.h.

  {
    int ini = padding ? signal.size() % 4 : 0;
    std::string res(ini, '0');
    for (auto const& bit : signal) {
      if (bit >= 0 && bit < 9) {
        res += std_logic_literal[(int) bit];
      } else {
        B2WARNING("invalid signal detected: " << static_cast<int>(bit));
        res += "0";
      }
    }
    return res;
  }

subset()

std::bitset< max - min+1 > subset

(

std::bitset< nbits >

set

)

extract a subset of bitstring, like substring.

In principle this can be done using only integer manipulations, but for the sake of simplicity, let's just cast them to string. Beware the endianness. 0 refer to the rightmost bit in std::bitset, but the leftmost bit in std::string

Definition at line 120 of file Cosim.h.

  {
    const size_t outWidth = max - min + 1;
    std::string str = set.to_string();
    return std::bitset<outWidth>(str.substr(nbits - max - 1, outWidth));
  }

Variable Documentation

one_val

const char one_val = 3

'1' in XSI VHDL simulation

Definition at line 43 of file Cosim.h.

std_logic_literal

const char* std_logic_literal[] = {"U", "X", "0", "1", "Z", "W", "L", "H", "-"}

In case you are not familiar with VHDL simulation, there are 9 possible values defined for the standard logic type, instead of just 0 and 1.

The simulator needs to compute all these possible outcomes. Therefore, XSI uses a byte, instead of a bit, to represent a std_logic. This is represented with a char with possible values ranging from 0 to 8.

Definition at line 40 of file Cosim.h.

zero_val

const char zero_val = 2

'0' in XSI VHDL simulation

Definition at line 45 of file Cosim.h.