Belle II Software  release-05-02-19
CDCTriggerTSFModule.cc
1 #include "trg/cdc/modules/trgcdc/CDCTriggerTSFModule.h"
2 
3 #include <cdc/dataobjects/CDCSimHit.h>
4 #include <mdst/dataobjects/MCParticle.h>
5 
6 #include <cdc/geometry/CDCGeometryPar.h>
7 #include <trg/cdc/Layer.h>
8 #include <trg/cdc/Wire.h>
9 #include <trg/cdc/WireHit.h>
10 #include <trg/cdc/Segment.h>
11 
12 #include <fstream>
13 
14 #define P3D HepGeom::Point3D<double>
15 
16 using namespace std;
17 using namespace Belle2;
18 
19 //this line registers the module with the framework and actually makes it available
20 //in steering files or the the module list (basf2 -m).
21 REG_MODULE(CDCTriggerTSF);
22 
23 CDCTriggerTSFModule::CDCTriggerTSFModule() : Module::Module()
24 {
26  "The Track Segment Finder module of the CDC trigger.\n"
27  "Combines CDCHits from the same super layer to CDCTriggerSegmentHits.\n"
28  );
30  addParam("CDCHitCollectionName",
32  "Name of the input StoreArray of CDCHits.",
33  string(""));
34  addParam("TSHitCollectionName",
36  "Name of the output StoreArray of CDCTriggerSegmentHits.",
37  string(""));
38  addParam("InnerTSLUTFile",
40  "The filename of LUT for track segments from the inner-most super layer",
41  string(""));
42  addParam("OuterTSLUTFile",
44  "The filename of LUT for track segments from the outer super layers",
45  string(""));
46  addParam("ClockSimulation",
48  "Switch to simulate each data clock cycle separately.",
49  false);
50  addParam("makeTrueLRTable",
52  "Switch to create a table of hit pattern <-> "
53  "number of true left / true right, which is needed to create the LUT",
54  false);
55  addParam("innerTrueLRTableFilename",
57  "Filename for the true left/right table for the innermost super layer.",
58  string("innerTrueLRTable.dat"));
59  addParam("outerTrueLRTableFilename",
61  "Filename for the true left/right table for the outer super layers.",
62  string("outerTrueLRTable.dat"));
63 }
64 
65 void
67 {
68  // register DataStore elements
69  m_segmentHits.registerInDataStore(m_TSHitCollectionName);
71  if (m_makeTrueLRTable) {
72  StoreArray<CDCSimHit> simhits;
73  simhits.isRequired();
74  innerTrueLRTable.assign(pow(2, 16), vector<unsigned>(3, 0));
75  outerTrueLRTable.assign(pow(2, 12), vector<unsigned>(3, 0));
76  }
77  // register relations
78  StoreArray<MCParticle> mcparticles;
79  m_segmentHits.registerRelationTo(m_cdcHits);
80  mcparticles.registerRelationTo(m_segmentHits);
81 
82  // Prepare track segment shapes.
83  // First a structure of wires is created for all layers and super layers.
84  // Each track segment consists of pointers to wires in this structure.
86  const unsigned nLayers = cdc.nWireLayers();
87  TRGClock* clockTDC = new TRGClock("CDCTrigger TDC clock", 0, 500. / cdc.getTdcBinWidth());
88  TRGClock* clockData = new TRGClock("CDCTrigger data clock", *clockTDC, 1, 16);
89  clocks.push_back(clockTDC);
90  clocks.push_back(clockData);
91 
92  //...Loop over layers...
93  int superLayerId = -1;
94  unsigned lastNWires = 0;
95  int lastShifts = -1000;
96  // separate counters for axial and stereo layers and super layers
97  int ia = -1;
98  int is = -1;
99  int ias = -1;
100  int iss = -1;
101  /* cppcheck-suppress variableScope */
102  unsigned axialStereoLayerId;
103  unsigned axialStereoSuperLayerId = 0;
104  unsigned nWires = 0;
105  for (unsigned i = 0; i < nLayers; i++) {
106  const unsigned nWiresInLayer = cdc.nWiresInLayer(i);
107 
108  //...Axial or stereo?...
109  int nShifts = cdc.nShifts(i);
110  bool axial = (nShifts == 0);
111  if (axial) ++ia;
112  else ++is;
113  axialStereoLayerId = (axial) ? ia : is;
114 
115  //...Is this in a new super layer?...
116  if ((lastNWires != nWiresInLayer) || (lastShifts != nShifts)) {
117  ++superLayerId;
118  superLayers.push_back(vector<TRGCDCLayer*>());
119  if (axial) ++ias;
120  else ++iss;
121  axialStereoSuperLayerId = (axial) ? ias : iss;
122  lastNWires = nWiresInLayer;
123  lastShifts = nShifts;
124  }
125 
126  //...Calculate radius of adjacent field wires...
127  const float swr = cdc.senseWireR(i);
128  const float innerRadius = cdc.fieldWireR(i - 1);
129  const float outerRadius = (i < nLayers - 1) ?
130  cdc.fieldWireR(i) :
131  swr + (swr - innerRadius);
132 
133  //...New layer...
134  TRGCDCLayer* layer = new TRGCDCLayer(i,
135  superLayerId,
136  superLayers[superLayerId].size(),
137  axialStereoLayerId,
138  axialStereoSuperLayerId,
139  cdc.zOffsetWireLayer(i),
140  nShifts,
141  M_PI * swr * swr / nWiresInLayer,
142  nWiresInLayer,
143  innerRadius,
144  outerRadius);
145  superLayers.back().push_back(layer);
146 
147  //...Loop over all wires in a layer...
148  for (unsigned j = 0; j < nWiresInLayer; j++) {
149  const P3D fp = P3D(cdc.wireForwardPosition(i, j).x(),
150  cdc.wireForwardPosition(i, j).y(),
151  cdc.wireForwardPosition(i, j).z());
152  const P3D bp = P3D(cdc.wireBackwardPosition(i, j).x(),
153  cdc.wireBackwardPosition(i, j).y(),
154  cdc.wireBackwardPosition(i, j).z());
155  TRGCDCWire* tw = new TRGCDCWire(nWires++, j, *layer, fp, bp, *clockTDC);
156  layer->push_back(tw);
157  }
158  }
159 
160  //...Make TSF's...
161  const unsigned nWiresInTS[2] = {15, 11};
162  const int shape[2][30] = {
163  {
164  -2, 0, // relative layer id, relative wire id
165  -1, -1,
166  -1, 0,
167  0, -1,
168  0, 0,
169  0, 1,
170  1, -2,
171  1, -1,
172  1, 0,
173  1, 1,
174  2, -2,
175  2, -1,
176  2, 0,
177  2, 1,
178  2, 2
179  },
180  {
181  -2, -1,
182  -2, 0,
183  -2, 1,
184  -1, -1,
185  -1, 0,
186  0, 0,
187  1, -1,
188  1, 0,
189  2, -1,
190  2, 0,
191  2, 1,
192  0, 0,
193  0, 0,
194  0, 0,
195  0, 0
196  }
197  };
198  const int layerOffset[2] = {5, 2};
199  unsigned id = 0;
200  unsigned idTS = 0;
201  for (unsigned i = 0; i < superLayers.size(); i++) {
202  unsigned tsType = (i) ? 1 : 0;
203 
204  //...TS layer... w is a central wire
205  const TRGCDCCell* ww = superLayers[i][layerOffset[tsType]]->front();
206  TRGCDCLayer* layer = new TRGCDCLayer(id++, *ww);
207  tsLayers.push_back(layer);
208 
209  //...Loop over all wires in a central wire layer...
210  const unsigned nWiresInLayer = ww->layer().nCells();
211  B2DEBUG(100, "SL " << i << " layerOffset " << layerOffset[tsType] << ", "
212  << superLayers[i].size() << " layers, " << nWiresInLayer << " wires");
213  for (unsigned j = 0; j < nWiresInLayer; j++) {
214  const TRGCDCWire& w =
215  (TRGCDCWire&) superLayers[i][layerOffset[tsType]]->cell(j);
216 
217  const unsigned localId = w.localId();
218  const unsigned layerId = w.localLayerId();
219  vector<const TRGCDCWire*> cells;
220 
221  B2DEBUG(110, "TS localId " << localId << " layerId " << layerId);
222 
223  for (unsigned k = 0; k < nWiresInTS[tsType]; k++) {
224  const int laid = layerId + shape[tsType][k * 2];
225  const int loid = localId + shape[tsType][k * 2 + 1];
226 
227  B2DEBUG(120, "cell localId " << loid << " layerId " << laid);
228 
229  const TRGCDCWire& c =
230  (TRGCDCWire&) superLayers[i][laid]->cell(loid);
231 
232  cells.push_back(&c);
233  }
234 
235  TRGCDCSegment* ts;
236  if (w.superLayerId()) {
237  ts = new TRGCDCSegment(idTS++,
238  *layer,
239  w,
240  *clockData,
242  cells);
243  } else {
244  ts = new TRGCDCSegment(idTS++,
245  *layer,
246  w,
247  *clockData,
249  cells);
250  }
251  ts->initialize();
252  layer->push_back(ts);
253  }
254  }
255 }
256 
257 void
259 {
261 
262  // fill CDCHits into track segment shapes
263 
264  //...Loop over CDCHits...
265  for (int i = 0; i < m_cdcHits.getEntries(); ++i) {
266  // get the wire
267  const CDCHit& h = *m_cdcHits[i];
268  TRGCDCWire& w =
269  (TRGCDCWire&) superLayers[h.getISuperLayer()][h.getILayer()]->cell(h.getIWire());
270 
271  // trigger timing signal
272  const int tdcCount = floor((cdc.getT0(WireID(h.getID())) / cdc.getTdcBinWidth()
273  - h.getTDCCount() + 0.5) / 2);
274  TRGTime rise = TRGTime(tdcCount, true, w.signal().clock(), w.name());
275  TRGTime fall = rise;
276  fall.shift(1).reverse();
277  TRGSignal signal = rise & fall;
278  w.addSignal(signal);
279 
280  if (w.hit()) continue;
281  // make a trigger wire hit (needed for relations)
282  // all unneeded variables are set to 0 (TODO: remove them completely?)
283  TRGCDCWireHit* hit = new TRGCDCWireHit(w, i,
284  0, 0, 0, 0, 0, 0, 0, 0);
285  w.hit(hit);
286  }
287 
288 
289 
290  // neibor supression
291  unsigned neibor_hit[10][1000] = {};
292  for (unsigned isl = 0; isl < tsLayers.size(); ++isl) {
293  for (unsigned its = 0; its < tsLayers[isl]->nCells(); ++its) {
294  TRGCDCSegment& s = (TRGCDCSegment&) tsLayers[isl]->cell(its);
295  // simulate with logicLUTFlag = true
296  // TODO: either add parameter or remove the option in Segment::simulate()
297  s.simulate(m_clockSimulation, true,
299  if (!m_clockSimulation && s.signal().active() && s.priorityPosition() == 3) {
300  neibor_hit[isl][its] = 1;
301  }
302  }
303  }
304 
305  // simulate track segments and create track segment hits
306  for (unsigned isl = 0; isl < tsLayers.size(); ++isl) {
307  for (unsigned its = 0; its < tsLayers[isl]->nCells(); ++its) {
308  TRGCDCSegment& s = (TRGCDCSegment&) tsLayers[isl]->cell(its);
309  // simulate with logicLUTFlag = true
310  // TODO: either add parameter or remove the option in Segment::simulate()
311  s.simulate(m_clockSimulation, true,
313  // store hits and create relations
314  // for clock simulation already done in simulate
315  // TODO: move it to simulate also for simulateWithoutClock?
316  if (!m_clockSimulation && s.signal().active()) {
317 
318  //neibor supression
319  if (s.priorityPosition() != 3 && (neibor_hit[isl][(its - 1) % tsLayers[isl]->nCells()] == 1
320  || neibor_hit[isl][(its + 1) % tsLayers[isl]->nCells()] == 1))continue;
321 
322  const CDCHit* priorityHit = m_cdcHits[s.priority().hit()->iCDCHit()];
323  const CDCTriggerSegmentHit* tsHit =
324  m_segmentHits.appendNew(*priorityHit,
325  s.id(),
326  s.priorityPosition(),
327  s.LUT()->getValue(s.lutPattern()),
328  s.priorityTime(),
329  s.fastestTime(),
330  s.foundTime());
331  // relation to all CDCHits in segment
332  for (unsigned iw = 0; iw < s.wires().size(); ++iw) {
333  const TRGCDCWire* wire = (TRGCDCWire*)s[iw];
334  if (wire->signal().active()) {
335  // priority wire has relation weight 2
336  double weight = (wire == &(s.priority())) ? 2. : 1.;
337  tsHit->addRelationTo(m_cdcHits[wire->hit()->iCDCHit()], weight);
338  }
339  }
340  // relation to MCParticles (same as priority hit)
342  for (unsigned imc = 0; imc < mcrel.size(); ++imc) {
343  mcrel[imc]->addRelationTo(tsHit, mcrel.weight(imc));
344  }
345  // get true left/right
346  if (m_makeTrueLRTable) {
347  const CDCSimHit* simHit = priorityHit->getRelatedFrom<CDCSimHit>();
348  if (simHit && !simHit->getBackgroundTag()) {
349  if (isl == 0)
350  innerTrueLRTable[s.lutPattern()][simHit->getLeftRightPassage()] += 1;
351  else
352  outerTrueLRTable[s.lutPattern()][simHit->getLeftRightPassage()] += 1;
353  } else {
354  if (isl == 0)
355  innerTrueLRTable[s.lutPattern()][2] += 1;
356  else
357  outerTrueLRTable[s.lutPattern()][2] += 1;
358  }
359  }
360  }
361  }
362  }
363 
364  //...Clear hit information after we're finished...
365  clear();
366 }
367 
368 void
370 {
371  // delete clocks
372  for (unsigned ic = 0; ic < clocks.size(); ++ic) {
373  delete clocks[ic];
374  }
375  clocks.clear();
376 
377  // delete wire layers
378  for (unsigned isl = 0; isl < superLayers.size(); ++isl) {
379  for (unsigned il = 0; il < superLayers[isl].size(); ++il) {
380  for (unsigned iw = 0; iw < superLayers[isl][il]->nCells(); ++iw) {
381  delete &(superLayers[isl][il]->cell(iw));
382  }
383  delete superLayers[isl][il];
384  }
385  superLayers[isl].clear();
386  }
387  superLayers.clear();
388 
389  // delete TS layers
390  for (unsigned isl = 0; isl < tsLayers.size(); ++isl) {
391  for (unsigned its = 0; its < tsLayers[isl]->nCells(); ++its) {
392  delete &(tsLayers[isl]->cell(its));
393  }
394  delete tsLayers[isl];
395  }
396  tsLayers.clear();
397 
398  // save true left/right table
399  if (m_makeTrueLRTable) {
400  ofstream innerFile(m_innerTrueLRTableFilename);
401  ostream_iterator<unsigned> innerIterator(innerFile, " ");
402  for (unsigned pattern = 0; pattern < innerTrueLRTable.size(); ++pattern) {
403  copy(innerTrueLRTable[pattern].begin(), innerTrueLRTable[pattern].end(),
404  innerIterator);
405  innerFile << "\n";
406  }
407  ofstream outerFile(m_outerTrueLRTableFilename);
408  ostream_iterator<unsigned> outerIterator(outerFile, " ");
409  for (unsigned pattern = 0; pattern < outerTrueLRTable.size(); ++pattern) {
410  copy(outerTrueLRTable[pattern].begin(), outerTrueLRTable[pattern].end(),
411  outerIterator);
412  outerFile << "\n";
413  }
414  }
415 }
416 
417 void
419 {
420  for (unsigned isl = 0; isl < superLayers.size(); ++isl) {
421  for (unsigned il = 0; il < superLayers[isl].size(); ++il) {
422  for (unsigned iw = 0; iw < superLayers[isl][il]->nCells(); ++iw) {
423  TRGCDCWire& w = (TRGCDCWire&) superLayers[isl][il]->cell(iw);
424  delete w.hit();
425  w.clear();
426  }
427  }
428  for (unsigned its = 0; its < tsLayers[isl]->nCells(); ++its) {
429  TRGCDCSegment& s = (TRGCDCSegment&) tsLayers[isl]->cell(its);
430  s.clear();
431  }
432  }
433 }
Belle2::RelationVector::size
size_t size() const
Get number of relations.
Definition: RelationVector.h:98
Belle2::TRGSignal
A class to represent a digitized signal. Unit is nano second.
Definition: Signal.h:28
Belle2::WireID
Class to identify a wire inside the CDC.
Definition: WireID.h:44
Belle2::CDCTriggerTSFModule::innerTrueLRTable
std::vector< std::vector< unsigned > > innerTrueLRTable
list of (# true right, # true left, # true background) for the inner-most super layer
Definition: CDCTriggerTSFModule.h:78
Belle2::CDCTriggerTSFModule::m_makeTrueLRTable
bool m_makeTrueLRTable
switch for saving the number of true left/right for each pattern
Definition: CDCTriggerTSFModule.h:61
Belle2::TRGCDCLayer::nCells
unsigned nCells(void) const
returns # of cells.
Definition: Layer.h:192
Belle2::TRGTime::shift
TRGTime & shift(int unit)
delays by clock unit.
Definition: Time.h:168
Belle2::StoreArray::registerRelationTo
bool registerRelationTo(const StoreArray< TO > &toArray, DataStore::EDurability durability=DataStore::c_Event, DataStore::EStoreFlags storeFlags=DataStore::c_WriteOut, const std::string &namedRelation="") const
Register a relation to the given StoreArray.
Definition: StoreArray.h:150
Belle2::Module::setDescription
void setDescription(const std::string &description)
Sets the description of the module.
Definition: Module.cc:216
Belle2::TRGCDCCell::layer
const TRGCDCLayer & layer(void) const
returns a pointer to a layer.
Definition: Cell.h:233
REG_MODULE
#define REG_MODULE(moduleName)
Register the given module (without 'Module' suffix) with the framework.
Definition: Module.h:652
Belle2::Module::c_ParallelProcessingCertified
@ c_ParallelProcessingCertified
This module can be run in parallel processing mode safely (All I/O must be done through the data stor...
Definition: Module.h:82
Belle2::CDCHit
Class containing the result of the unpacker in raw data and the result of the digitizer in simulation...
Definition: CDCHit.h:51
Belle2::CDCTriggerTSFModule::tsLayers
std::vector< TRGCDCLayer * > tsLayers
structure to hold pointers to all track segment shapes
Definition: CDCTriggerTSFModule.h:73
Belle2::RelationsInterface::addRelationTo
void addRelationTo(const RelationsInterface< BASE > *object, float weight=1.0, const std::string &namedRelation="") const
Add a relation from this object to another object (with caching).
Definition: RelationsObject.h:144
Belle2::CDCTriggerTSFModule::m_cdcHits
StoreArray< CDCHit > m_cdcHits
list of input CDC hits
Definition: CDCTriggerTSFModule.h:84
Belle2::TRGCDCWire
A class to represent a wire in CDC.
Definition: Wire.h:57
Belle2::CDCTriggerTSFModule::m_outerTrueLRTableFilename
std::string m_outerTrueLRTableFilename
filename for the table which contains the number of true left/right for each pattern in the outer sup...
Definition: CDCTriggerTSFModule.h:67
Belle2::CDCSimHit
Example Detector.
Definition: CDCSimHit.h:33
Belle2::TRGCDCLayer
A class to represent a cell layer.
Definition: Layer.h:34
Belle2::CDCTriggerTSFModule::m_innerTSLUTFilename
std::string m_innerTSLUTFilename
The filename of LUT for the inner-most track segments.
Definition: CDCTriggerTSFModule.h:55
Belle2::Module
Base class for Modules.
Definition: Module.h:74
Belle2::TRGSignal::active
bool active(void) const
returns true if there is a signal.
Definition: Signal.h:279
Belle2::CDCTriggerTSFModule::superLayers
std::vector< std::vector< TRGCDCLayer * > > superLayers
structure to hold pointers to all wires in the CDC
Definition: CDCTriggerTSFModule.h:71
Belle2::TRGCDCCell
A class to represent a wire in CDC.
Definition: Cell.h:41
Belle2::Module::setPropertyFlags
void setPropertyFlags(unsigned int propertyFlags)
Sets the flags for the module properties.
Definition: Module.cc:210
Belle2::CDCTriggerTSFModule::m_CDCHitCollectionName
std::string m_CDCHitCollectionName
name of the input StoreArray
Definition: CDCTriggerTSFModule.h:51
Belle2::CDC::CDCGeometryPar
The Class for CDC Geometry Parameters.
Definition: CDCGeometryPar.h:75
Belle2::TRGCDCCellHit::iCDCHit
unsigned iCDCHit(void) const
returns an index to CDCHit.
Definition: CellHit.h:361
Belle2::RelationVector
Class for type safe access to objects that are referred to in relations.
Definition: DataStore.h:38
Belle2::CDC::CDCGeometryPar::Instance
static CDCGeometryPar & Instance(const CDCGeometry *=nullptr)
Static method to get a reference to the CDCGeometryPar instance.
Definition: CDCGeometryPar.cc:41
Belle2
Abstract base class for different kinds of events.
Definition: MillepedeAlgorithm.h:19
Belle2::CDCTriggerTSFModule::initialize
virtual void initialize() override
Initialize the module and register DataStore arrays.
Definition: CDCTriggerTSFModule.cc:66
Belle2::RelationsInterface::getRelationsFrom
RelationVector< FROM > getRelationsFrom(const std::string &name="", const std::string &namedRelation="") const
Get the relations that point from another store array to this object.
Definition: RelationsObject.h:214
Belle2::TRGCDCWireHit
A class to represent a wire hit in CDC.
Definition: WireHit.h:34
Belle2::CDCSimHit::getLeftRightPassage
int getLeftRightPassage() const
The method to get new left/right info. for tracking.
Definition: CDCSimHit.h:255
Belle2::CDCTriggerTSFModule::m_TSHitCollectionName
std::string m_TSHitCollectionName
name of the output StoreArray
Definition: CDCTriggerTSFModule.h:53
Belle2::CDCTriggerTSFModule::event
virtual void event() override
Run the TSF for an event.
Definition: CDCTriggerTSFModule.cc:258
Belle2::TRGCDCWire::hit
const TRGCDCWireHit * hit(void) const
returns a pointer to a TRGCDCWireHit.
Definition: Wire.h:144
Belle2::CDCTriggerTSFModule::m_clockSimulation
bool m_clockSimulation
switch for simulating clock by clock
Definition: CDCTriggerTSFModule.h:59
Belle2::TRGCDCSegment
A class to represent a wire in CDC.
Definition: Segment.h:40
Belle2::Module::addParam
void addParam(const std::string &name, T &paramVariable, const std::string &description, const T &defaultValue)
Adds a new parameter to the module.
Definition: Module.h:562
Belle2::CDCTriggerTSFModule::outerTrueLRTable
std::vector< std::vector< unsigned > > outerTrueLRTable
list of (# true right, # true left, # true background) for the outer super layers
Definition: CDCTriggerTSFModule.h:81
Belle2::CDCTriggerTSFModule::clear
void clear()
remove hit information from last event
Definition: CDCTriggerTSFModule.cc:418
Belle2::CDCTriggerTSFModule::m_outerTSLUTFilename
std::string m_outerTSLUTFilename
The filename of LUT for outer track segments.
Definition: CDCTriggerTSFModule.h:57
Belle2::RelationVector::weight
float weight(int index) const
Get weight with index.
Definition: RelationVector.h:120
Belle2::SimHitBase::getBackgroundTag
virtual unsigned short getBackgroundTag() const
Get background tag.
Definition: SimHitBase.h:56
Belle2::MCParticle
A Class to store the Monte Carlo particle information.
Definition: MCParticle.h:43
Belle2::StoreArray
Accessor to arrays stored in the data store.
Definition: ECLMatchingPerformanceExpertModule.h:33
Belle2::TRGCDCWire::signal
const TRGSignal & signal(void) const override
returns an input to the trigger. This is sync'ed to 1GHz clock.
Definition: Wire.h:225
Belle2::TRGTime
A class to represent a signal timing in the trigger system.
Definition: Time.h:30
Belle2::CDCTriggerSegmentHit
Combination of several CDCHits to a track segment hit for the trigger.
Definition: CDCTriggerSegmentHit.h:16
Belle2::CDCTriggerTSFModule::m_innerTrueLRTableFilename
std::string m_innerTrueLRTableFilename
filename for the table which contains the number of true left/right for each pattern in the inner-mos...
Definition: CDCTriggerTSFModule.h:64
Belle2::CDCTriggerTSFModule::terminate
virtual void terminate() override
Clean up pointers.
Definition: CDCTriggerTSFModule.cc:369
Belle2::TRGClock
A class to represent a digitized signal. Unit is nano second.
Definition: Clock.h:43
Belle2::CDCTriggerTSFModule::m_segmentHits
StoreArray< CDCTriggerSegmentHit > m_segmentHits
list of output track segment hits
Definition: CDCTriggerTSFModule.h:86
Belle2::CDCTriggerTSFModule::clocks
std::vector< TRGClock * > clocks
list of clocks used in the TSF
Definition: CDCTriggerTSFModule.h:75
Belle2::RelationsInterface::getRelatedFrom
FROM * getRelatedFrom(const std::string &name="", const std::string &namedRelation="") const
Get the object from which this object has a relation.
Definition: RelationsObject.h:265
Belle2::TRGTime::reverse
TRGTime & reverse(void)
reverse edge.
Definition: Time.h:146