Belle II Software  release-05-02-19
PXDPackerErrModule.cc
1 /**************************************************************************
2  * BASF2 (Belle Analysis Framework 2) *
3  * Copyright(C) 2010 - Belle II Collaboration *
4  * *
5  * Author: The Belle II Collaboration *
6  * Contributors: Bjoern Spruck *
7  * *
8  * This software is provided "as is" without any warranty. *
9  **************************************************************************/
10 
11 #include <pxd/unpacking/PXDRawDataDefinitions.h>
12 #include <pxd/modules/pxdUnpacking/PXDPackerErrModule.h>
13 #include <framework/datastore/DataStore.h>
14 #include <framework/logging/Logger.h>
15 #include <framework/dataobjects/EventMetaData.h>
16 #include <framework/datastore/StoreObjPtr.h>
17 #include <framework/core/ModuleParam.templateDetails.h>
18 
19 #include <boost/crc.hpp>
20 
21 #include <numeric>
22 
23 #include <TRandom.h>
24 
25 using namespace std;
26 using namespace Belle2;
27 using namespace Belle2::PXD;
28 using namespace Belle2::PXD::PXDError;
29 
30 //-----------------------------------------------------------------
31 // Register the Module
32 //-----------------------------------------------------------------
33 REG_MODULE(PXDPackerErr)
34 
35 
36 using boost::crc_optimal;
37 typedef crc_optimal<32, 0x04C11DB7, 0, 0, false, false> dhc_crc_32_type;
38 
42 std::vector <PXDErrorFlags> PXDPackerErrModule::m_errors = {
43  // Event 0 does not exist...
44  c_NO_ERROR,
45  /* 1 - HLT-Onsen Trigger differs from Meta (meta changed! thus all differ)
46  * 2 - HLT-Onsen Trigger is zero
47  * 3 - Run Nr differs between HLT-Onsen and Meta
48  * 4 - Subrun Nr differs between HLT-Onsen and Meta
49  * 5 - Exp differs between HLT-Onsen and Meta */
50  c_META_MM | c_META_MM_DHC | c_META_MM_DHE | c_META_MM_ONS_HLT | c_META_MM_ONS_DC,
51  c_META_MM | c_META_MM_DHC | c_META_MM_DHE | c_META_MM_ONS_HLT | c_META_MM_ONS_DC,
52  c_META_MM_DHC_ERS | c_META_MM_ONS_HLT | c_META_MM_ONS_DC,
53  c_META_MM_DHC_ERS | c_META_MM_ONS_HLT | c_META_MM_ONS_DC,
54  c_META_MM_DHC_ERS | c_META_MM_ONS_HLT | c_META_MM_ONS_DC,
55  /* 6 - Wrong ONS Trigger frame length
56  * 7 - Wrong DHC Start frame length
57  * 8 - Wrong DHC End frame length
58  * 9 - Wrong DHE Start frame length
59  * 10 - Wrong DHE End frame length */
60  c_FIX_SIZE, // TODO why mismatch?
61  c_FIX_SIZE, // TODO Problem
62  c_FIX_SIZE, // TODO why is DHC End missing not detected?
63  c_FIX_SIZE, // TODO why is DHE Start missing not detected?
64  c_FIX_SIZE, // TODO why is DHE End missing not detected?
65  /* 11 - Wrong DHE Start frame length (by 2 bytes), unalign 32 bit frame
66  * 12 - Missing ONS Trig frame
67  * 13 - Missing DHC Start frame
68  * 14 - Missing DHC End frame
69  * 15 - Missing DHE Start frame */
70  c_FRAME_SIZE, // TODO can check more errors
71  c_ONSEN_TRG_FIRST | c_DHC_START_SECOND | c_DHE_START_THIRD | c_EVENT_STRUCT, // TODO
72  c_DHC_START_SECOND, // TODO
73  c_DHC_END_MISS,
74  c_DHE_END_WO_START | c_DHE_START_THIRD, // TODO
75  /* 16 - Missing DHE End frame
76  * 17 - Double ONS Trig frame
77  * 18 - Double DHC Start frame
78  * 19 - Double DHC End frame
79  * 20 - Double DHE Start frame*/
80  c_DHE_START_WO_END, // TODO if two DHE, another error condition shoudl trigger, too
81  c_ONSEN_TRG_FIRST | c_DHC_START_SECOND | c_DHE_START_THIRD | c_EVENT_STRUCT, // TODO why data outside of ...
82  c_DHC_START_SECOND | c_DHE_START_THIRD, // TODO why data outside of ...
83  c_DHC_END_DBL, // TODO
84  c_DHE_WRONG_ID_SEQ | c_DHE_START_WO_END, // TODO
85  /* 21 - Double DHE End frame
86  * 22 - DATCON triggernr+1
87  * 23 - HLT Magic broken
88  * 24 - DATCON Magic broken
89  * 25 - HLT with Accepted not set */
90  c_DHE_END_WO_START | c_DHE_START_END_ID, // TODO
91  c_MERGER_TRIGNR | c_META_MM_ONS_DC,
92  c_HLTROI_MAGIC,
93  c_HLTROI_MAGIC,
94  c_NO_ERROR | c_NOTSENDALL_TYPE, // TODO =============================================== CHECK TODO Unpacker is not detecting this yet
95  /* 26 - HLT triggernr+1
96  * 27 - CRC error in second frame (DHC start)
97  * 28 - data for all DHE even if disabled in mask
98  * 29 - no DHE at all, even so mask tell us otherwise
99  * 30 - no DHC at all */
100  c_MERGER_TRIGNR | c_META_MM_ONS_HLT,
101  c_DHE_CRC, // TODO why DHE start missing not detected?
102  c_DHE_ACTIVE, // TODO why | c_DHE_WRONG_ID_SEQ | c_DHE_ID_INVALID,
103  c_DHE_START_THIRD | c_DHE_ACTIVE,
104  c_DHC_END_MISS, // TODO need some better checks
105  /* 31 - DHC end has wrong DHC id
106  * 32 - DHE end has wrong DHE id
107  * 33 - DHC wordcount wrong by 4 bytes
108  * 34 - DHE wordcount wrong by 4 bytes
109  * 35 - DHE Trigger Nr Hi word messed up */
110  c_DHC_DHCID_START_END_MM,
111  c_DHE_START_END_ID,
112  c_DHC_WIE,
113  c_DHE_WIE,
114  c_META_MM_DHE,
115  /* 36 - ONS Trigger Nr Hi word messed up
116  * 37 - DHP data, even if mask says no DHP TODO Check
117  * 38 - No DHP data, even if mask tell otherwise
118  * 39 - DHE id differ in DHE and DHP header
119  * 40 - Chip ID differ in DHE and DHP header */
120  c_META_MM_ONS_HLT | c_MERGER_TRIGNR,
121  c_NO_ERROR, // TODO ===========================================TODO Unpacker is not detecting this
122  c_DHP_ACTIVE,
123  c_DHE_DHP_DHEID,
124  c_DHE_DHP_PORT,
125  /* 41 - Row overflow by 1
126  * 42 - Col overflow by 1
127  * 43 - Missing Start Row (Pixel w/o row)
128  * 44 - No PXD raw packet at all
129  * 45 - No DATCON data */
130  c_ROW_OVERFLOW,
131  c_COL_OVERFLOW,
132  c_DHP_PIX_WO_ROW,
133  c_NO_PXD,
134  c_NO_DATCON,
135  /* 46 - unused frame type: common mode
136  * 47 - unused frame type: FCE
137  * 48 - unused frame type: ONS FCE
138  * 49 - unused frame type: 0x7
139  * 50 - unused frame type: 0x8 */
140  c_UNEXPECTED_FRAME_TYPE,
141  c_UNEXPECTED_FRAME_TYPE,
142  c_UNEXPECTED_FRAME_TYPE,
143  c_DHC_UNKNOWN,
144  c_DHC_UNKNOWN,
145  /* 51 - unused frame type: 0xA
146  * 52 - Rows w/o Pixel (several rows after each other)
147  * 53 - no frames in packet (this should be an error)
148  * 54 - broken PXD packet magic
149  * 55 - exceeding allowed nr of frames by far */
150  c_DHC_UNKNOWN,
151  c_DHP_ROW_WO_PIX,
152  c_NR_FRAMES_TO_SMALL,
153  c_MAGIC,
154  c_FRAME_NR,
155  /* 56 - more frames than actual available, exceeding packet size
156  * 57 - one frame payload exceeding packet size
157  * 58 - DHC Start frame has wrong trigger Nr HI
158  * 59 - DHC Start frame has wrong trigger Nr LO
159  * 60 - DHE Start frame has wrong trigger Nr LO */
160  c_FRAME_SIZE,
161  c_FRAME_SIZE,
162  c_META_MM_DHC,
163  c_FRAME_TNR_MM | c_META_MM | c_META_MM_DHC,
164  c_FRAME_TNR_MM | c_META_MM | c_META_MM_DHE,
165  /* 61 - DHE End frame has wrong trigger Nr LO
166  * 62 - DHE End has different DHE Id
167  * 63 - DHE Z_DHP Header DHE ID differ from Start
168  * 64 - Set ERROR Flag in DHE END
169  * 65 - Invalid DHE ID ($3F) in DHE */
170  c_FRAME_TNR_MM | c_META_MM, // TODO why not |c_META_MM_DHE
171  c_DHE_START_END_ID, // TODO why not c_DHE_START_ID,
172  c_DHE_START_ID | c_DHE_DHP_DHEID,
173  c_HEADER_ERR,
174  c_DHE_ID_INVALID,
175  /* 66 - Doubled DHP Header
176  * 67 - 'FAKE' DHC START/END (=no data)
177  * 68 - wrong readout frame number in DHP header TODO
178  * 69 - DHP frame with too small size
179  * 70 - TimeTag Mismatch for DHC/Meta */
180  c_DHP_DBL_HEADER,
181  c_FAKE_NO_DATA_TRIG,
182  c_NO_ERROR,// TODO ===========================================TODO Unpacker is not detecting this
183  c_DHP_SIZE,
184  c_META_MM_DHC_TT,
185  /*
186  * 71 data outside of DHE
187  * 72 Fake no Fake mix, plus a second DHC
188  * 73 Fake no Fake mix, plus double DHC End
189  * 74 Fake no Fake mix, plus double DHC Start
190  * 75 Fake no Fake mix, replaced DHC End
191  */
192  c_DATA_OUTSIDE,
193  c_FAKE_NO_FAKE_DATA,
194  c_FAKE_NO_FAKE_DATA,
195  c_FAKE_NO_FAKE_DATA,
196  c_FAKE_NO_FAKE_DATA,
197  /*
198  * 76 Fake no Fake mix, replaced DHC Start
199  * 77 ROI Frame without header/content, inside DHC Start/End
200  * 78 ROI Frame without header/content, outside DHC Start/End ... this is not allowed (ONSEN)
201  * 79 TODO ROI Frame with header & content
202  * 80 TODO ROI Frame with header & content but errors
203  */
204  c_FAKE_NO_FAKE_DATA,
205  c_ROI_PACKET_INV_SIZE,
206  c_ROI_PACKET_INV_SIZE,// no error flag for this?
207  c_NO_ERROR,
208  c_NO_ERROR, // not error bit for this?
209 };
210 
211 bool PXDPackerErrModule::CheckErrorMaskInEvent(unsigned int eventnr, PXDErrorFlags mask)
212 {
215  PXDErrorFlags expected = c_NO_ERROR;
216  if (eventnr > 0 && eventnr < m_errors.size()) {
217  expected = m_errors[eventnr];
218  }
219  B2INFO("-- PXD Packer Error Check for Event Nr: " << eventnr);
220  for (int i = 0; i < ONSEN_MAX_TYPE_ERR; i++) {
221  uint64_t m;
222  m = 1ull << i; // ull is important!
223  if ((m & (mask | expected)) == m) {
224  if ((m & expected) == m && (m & mask) != m) {
225  B2ERROR("Bit " << i << ": Was NOT Set: " << getPXDBitErrorName(i));
226  m_found_fatal = true;
227  } else if ((m & expected) != m && (m & mask) == m) {
228  B2RESULT("Bit " << i << ": Optional : " << getPXDBitErrorName(i));
229  } else if ((m & expected) == m && (m & mask) == m) {
230  B2INFO("Bit " << i << ": As Expected: " << getPXDBitErrorName(i));
231  }
232  }
233  }
234  bool flag = (mask & expected) == expected;
235  if (expected == EPXDErrMask::c_NO_ERROR) {
236  // special check, this event should not contain any error!
237  if (mask != EPXDErrMask::c_NO_ERROR) {
238  B2ERROR("There should be no error in this event, but there were (see above)!");
239  m_found_fatal = true;
240  }
241  flag = (mask == EPXDErrMask::c_NO_ERROR);
242  }
243  B2INFO("-- PXD Packer Error Check END --- ");
244  // Bail out on the first check which fails.
245  if (m_found_fatal) B2FATAL("This check failed (see details above)!");
246  return flag;
247 }
248 
249 PXDPackerErrModule::PXDPackerErrModule() :
250  Module(),
251  m_storeRaws()
252 {
253  m_trigger_nr = 0;
254  m_packed_events = 0;
255  m_run_nr_word1 = 0;
256  m_run_nr_word2 = 0;
257  //Set module properties
258  setDescription("Create 'broken' PXD raw data to challenge Unpacker");
260 
261  addParam("RawPXDsName", m_RawPXDsName, "The name of the StoreArray of generated RawPXDs", std::string(""));
262  addParam("dhe_to_dhc", m_dhe_to_dhc, "DHE to DHC mapping (DHC_ID, DHE1, DHE2, ..., DHE5) ; -1 disable port");
263  addParam("InvertMapping", m_InvertMapping, "Use invers mapping to DHP row/col instead of \"remapped\" coordinates", false);
264  addParam("Clusterize", m_Clusterize, "Use clusterizer (FCE format)", false);
265  addParam("Check", m_Check, "Check the result of Unpacking", false);
266  addParam("PXDDAQEvtStatsName", m_PXDDAQEvtStatsName, "The name of the StoreObjPtr of read PXDDAQEvtStats", std::string(""));
267 
268 }
269 
271 {
272  m_found_fatal = false;
273  B2DEBUG(27, "PXD Packer Err --> Init");
274  if (m_Check) {
275  B2WARNING("=== Important! A lot of intentional errors will follow. To find the reason for a failing test, check the lines before the FATAL. ====");
276  m_daqStatus.isRequired();
277  } else {
278  //Register output collections
279  m_storeRaws.registerInDataStore(m_RawPXDsName, DataStore::EStoreFlags::c_ErrorIfAlreadyRegistered);
280  m_packed_events = 0;
281 
285  for (auto& it : m_dhe_to_dhc) {
286  bool flag;
287  int dhc_id;
288  B2DEBUG(27, "PXD Packer Err --> DHC/DHE");
289  flag = false;
290  if (it.size() != 6) {
292  B2WARNING("PXD Packer Err --> DHC/DHE maps 1 dhc to 5 dhe (1+5 values), but I found " << it.size());
293  }
294  for (auto& it2 : it) {
295  if (flag) {
296  int v;
297  v = it2;
298  B2DEBUG(27, "PXD Packer Err --> ... DHE " << it2);
299  if (it2 < -1 || it2 >= 64) {
300  if (it2 != -1) B2ERROR("PXD Packer Err --> DHC id " << it2 << " is out of range (0-64 or -1)! disable channel.");
301  v = -1;
302  }
303  m_dhc_mapto_dhe[dhc_id].push_back(v);
304  } else {
305  dhc_id = it2;
306  B2DEBUG(27, "PXD Packer Err --> DHC .. " << it2);
307  if (dhc_id < 0 || dhc_id >= 16) {
308  B2ERROR("PXD Packer Err --> DHC id " << it2 << " is out of range (0-15)! skip");
309  break;
310  }
311  }
312  flag = true;
313  }
314  }
315  B2DEBUG(27, "PXD Packer Err --> DHC/DHE done");
316 
317  for (auto& it : m_dhc_mapto_dhe) {
318  int port = 0;
319  B2DEBUG(27, "PXD Packer Err --> DHC " << it.first);
320  for (auto& it2 : it.second) {
321  B2DEBUG(27, "PXD Packer Err --> .. connects to DHE " << it2 << " port " << port);
322  port++;
323  }
324  }
325  }
326 }
327 
329 {
330  if (m_Check) {
331  // Bail out if error detected
332  if (m_found_fatal) B2FATAL("At least one of the checks failed (see details above)!");
333  // Check kindof test coverage
334  B2INFO("Check Test coverage:");
335  PXDErrorFlags mask = c_NO_ERROR;
336  mask = std::accumulate(m_errors.begin(), m_errors.end(), mask, std::bit_or<PXDErrorFlags>());
337  for (int i = 0; i < ONSEN_MAX_TYPE_ERR; i++) {
338  uint64_t m;
339  m = 1ull << i; // ull is important!
340  if ((m & mask) == 0) {
341  B2WARNING("Bit " << i << ": Not Covered : " << getPXDBitErrorName(i));
342  }
343  }
344  }
345 }
346 
348 {
349  B2DEBUG(27, "PXD Packer Err --> Event");
351 
352  m_real_trigger_nr = m_trigger_nr = evtPtr->getEvent();
353 
354  if (m_Check) {
356  } else {
357 
358  // First, throw the dices for a few event-wise properties
359 
360  m_trigger_dhp_framenr = gRandom->Integer(0x10000);
361  m_trigger_dhe_gate = gRandom->Integer(192);
362 
363 
364  if (isErrorIn(1)) m_trigger_nr += 10;
365  if (isErrorIn(2)) m_trigger_nr = 0;
366 
367  uint32_t run = evtPtr->getRun();
368  uint32_t exp = evtPtr->getExperiment();
369  uint32_t sub = evtPtr->getSubrun();
370 
371  if (isErrorIn(3)) run++;
372  if (isErrorIn(4)) sub++;
373  if (isErrorIn(5)) exp++;
374 
375  m_run_nr_word1 = ((run & 0xFF) << 8) | (sub & 0xFF);
376  m_run_nr_word2 = ((exp & 0x3FF) << 6) | ((run >> 8) & 0x3F);
377  m_meta_time = evtPtr->getTime();
378 
379  B2INFO("Pack Event : " << evtPtr->getEvent() << "," << evtPtr->getRun() << "," << evtPtr->getSubrun() << "," <<
380  evtPtr->getExperiment() << "," << evtPtr->getTime() << " (MetaInfo)");
381 
382  if (!isErrorIn(44)) {
383  pack_event();
384  m_packed_events++;
385  }
386  }
387 }
388 
390 {
391  int dhe_ids[5] = {0, 0, 0, 0, 0};
392  B2DEBUG(27, "PXD Packer Err --> pack_event");
393 
394  // loop for each DHC in system
395  // get active DHCs from a database?
396  for (auto& it : m_dhc_mapto_dhe) {
397  int port = 1, port_inx = 0;
398  int act_port = 0;
399 
400  for (auto& it2 : it.second) {
401  if (it2 >= 0) act_port += port;
402  port += port;
403  dhe_ids[port_inx] = it2;
404  port_inx++;
405  if (port_inx == 5) break; // not more than five.. checked above
406  }
407 
408  // if(act_port&0x1F) B2ERROR();... checked above
409  // act_port&=0x1F;... checked above
410 
411  // get active DHE mask from a database?
412 
413  m_onsen_header.clear();// Reset
414  m_onsen_payload.clear();// Reset
415  if (isErrorIn(74)) {
416  // add a faked DHC, "no data"
417  start_frame();
418  append_int32(EDHCFrameHeaderDataType::c_DHC_START << 27);
419  append_int16(0);
420  append_int16(0);
421  append_int16(0);
422  append_int16(0);
423  append_int16(0);
424  append_int16(0);
426  }
427  if (!isErrorIn(53)) pack_dhc(it.first, act_port, dhe_ids);
428  // and write to PxdRaw object
429  // header will be finished and endian swapped by constructor; payload already has be on filling the vector
430  if (isErrorIn(73)) {
431  // add a faked DHC, "no data"
432  start_frame();
433  append_int32(EDHCFrameHeaderDataType::c_DHC_END << 27);
434  append_int32(0);
435  append_int32(0);
437  }
438  if (isErrorIn(72)) {
439  // add a faked DHC, "no data"
440  start_frame();
441  append_int32(EDHCFrameHeaderDataType::c_DHC_START << 27);
442  append_int16(0);
443  append_int16(0);
444  append_int16(0);
445  append_int16(0);
446  append_int16(0);
447  append_int16(0);
449 
450  start_frame();
451  append_int32(EDHCFrameHeaderDataType::c_DHC_END << 27);
452  append_int32(0);
453  append_int32(0);
455  }
456  auto objptr = m_storeRaws.appendNew(m_onsen_header, m_onsen_payload);
457  if (isErrorIn(54)) {
458  objptr->data()[0] = 0xDEADBEAF; // invalid magic
459  }
460  if (isErrorIn(55)) {
461  objptr->data()[1] = 0x00110000; // invalid #frames
462  }
463  if (isErrorIn(56)) {
464  objptr->data()[1] = 0x00010000; // valid #frames, but will exceed size
465  }
466  if (isErrorIn(57)) {
467  objptr->data()[2] = 0x01010101; // extremely large frame
468  }
469  }
470 
471 }
472 
474 {
475  if (m_current_frame.size() & 0x3) {
476  B2WARNING("Frame is not 32bit aligned!!! Unsupported by Unpacker!");
477  }
478  // checksum frame
479  dhc_crc_32_type current_crc;
480  current_crc.process_bytes(m_current_frame.data(), m_current_frame.size());
481  if (isErrorIn(27) and m_onsen_header.size() == 1) current_crc.process_byte(0x42); // mess up CRC in second frame
482  append_int32(current_crc.checksum());
483 
484  // and add it
485  m_onsen_header.push_back(m_current_frame.size());
486  m_onsen_payload.push_back(m_current_frame);
487 }
488 
489 void PXDPackerErrModule::append_int8(unsigned char w)
490 {
491  m_current_frame.push_back(w);
492  dhe_byte_count++;
493  dhc_byte_count++;
494 }
495 
496 void PXDPackerErrModule::append_int16(unsigned short w)
497 {
498  m_current_frame.push_back((unsigned char)(w >> 8));
499  m_current_frame.push_back((unsigned char)(w));
500  dhe_byte_count += 2;
501  dhc_byte_count += 2;
502 }
503 
505 {
506  m_current_frame.push_back((unsigned char)(w >> 24));
507  m_current_frame.push_back((unsigned char)(w >> 16));
508  m_current_frame.push_back((unsigned char)(w >> 8));
509  m_current_frame.push_back((unsigned char)(w));
510  dhe_byte_count += 4;
511  dhc_byte_count += 4;
512 }
513 
514 // void PXDPackerErrModule::remove_back_int32(void)
515 // {
516 // m_current_frame.pop_back();
517 // m_current_frame.pop_back();
518 // m_current_frame.pop_back();
519 // m_current_frame.pop_back();
520 // dhe_byte_count -= 4;
521 // dhc_byte_count -= 4;
522 // }
523 
525 {
526  m_current_frame.clear();
527 }
528 
529 void PXDPackerErrModule::pack_dhc(int dhc_id, int dhe_active, int* dhe_ids)
530 {
531  B2DEBUG(27, "PXD Packer Err --> pack_dhc ID " << dhc_id << " DHE act: " << dhe_active);
532 
533  bool m_send_all = true;
534  bool m_send_roi = false;
535 
537  start_frame();
538  append_int32((EDHCFrameHeaderDataType::c_ONSEN_TRG << 27) | (m_trigger_nr & 0xFFFF));
539  B2INFO("Trigger packet: $" << hex << m_run_nr_word1 << ", $" << m_run_nr_word2);
540  if (isErrorIn(23)) {
541  append_int32(0xDEAD8000);
542  } else if (isErrorIn(25)) {
543  append_int32(0xCAFE0000);// HLT HEADER, NO accepted flag
544  } else {
545  append_int32(0xCAFE8000 | (m_send_all ? 0x4000 : 0) | (m_send_roi ? 0x2000 : 0)); // HLT HEADER, accepted flag set
546  }
547  if (isErrorIn(26)) {
549  } else if (isErrorIn(36)) {
550  append_int32(0x10000000 | m_trigger_nr); // HLT Trigger Nr with Hi work messed up
551  } else {
552  append_int32(m_trigger_nr); // HLT Trigger Nr
553  }
554  append_int16(m_run_nr_word2); // HLT Run NR etc
555  append_int16(m_run_nr_word1); // HLT Run NR etc
556  if (isErrorIn(24)) append_int32(0xDEAD0000);
557  else append_int32(0xCAFE0000);// DATCON HEADER ...
558  if (isErrorIn(45)) {
559  // No Datcon
560  append_int32(0x0); // trigger nr
561  append_int32(0x0); // 2*16 trg tag
562  } else {
563  if (isErrorIn(22)) append_int32(m_trigger_nr + 1);
564  else append_int32(m_trigger_nr);// DATCON Trigger Nr
565  if (!isErrorIn(6)) {
566  append_int16(m_run_nr_word2); // DATCON Run NR etc
567  append_int16(m_run_nr_word1); // DATCON Run NR etc
568  }
569  }
570  if (!isErrorIn(12)) add_frame_to_payload();
571  if (isErrorIn(17)) {
572  // double frame
573  m_onsen_header.push_back(m_current_frame.size());
574  m_onsen_payload.push_back(m_current_frame);
575  }
576 
577  if (isErrorIn(30)) return; // empty event, no DHC frames
578 
580  if (!isErrorIn(67)) {
581 
582  dhc_byte_count = 0;
583  if (isErrorIn(76)) {
584  // add a faked DHC, "no data"
585  start_frame();
586  append_int32(EDHCFrameHeaderDataType::c_DHC_START << 27);
587  append_int16(0);
588  append_int16(0);
589  append_int16(0);
590  append_int16(0);
591  append_int16(0);
592  append_int16(0);
594  } else {
595  start_frame();
596  uint32_t header = (EDHCFrameHeaderDataType::c_DHC_START << 27) | ((dhc_id & 0xF) << 21) | ((dhe_active & 0x1F) << 16) |
597  (m_trigger_nr & 0xFFFF);
598  if (isErrorIn(59)) header++;
599  append_int32(header);
600  if (!isErrorIn(58)) append_int16(m_trigger_nr >> 16);
601  else append_int16((m_trigger_nr >> 16) + 1);
602 
603  uint32_t mm = (unsigned int)std::round((m_meta_time % 1000000000ull) * 0.127216); // in 127MHz Ticks
604  uint32_t ss = (unsigned int)(m_meta_time / 1000000000ull) ; // in seconds
605  if (isErrorIn(70)) mm++;
606  if (isErrorIn(70)) ss++;
607  append_int16(((mm << 4) & 0xFFF0) | 0x1); // TT 11-0 | Type --- fill with something usefull TODO
608  append_int16(((mm >> 12) & 0x7FFF) | ((ss & 1) ? 0x8000 : 0x0)); // TT 27-12 ... not clear if completely filled by DHC
609  append_int16((ss >> 1) & 0xFFFF); // TT 43-28 ... not clear if completely filled by DHC
610  if (!isErrorIn(7)) {
611  append_int16(m_run_nr_word1); // Run Nr 7-0 | Subrunnr 7-0
612  append_int16(m_run_nr_word2); // Exp NR 9-0 | Run Nr 13-8
613  }
614  if (!isErrorIn(13)) add_frame_to_payload();
615  if (isErrorIn(18)) {
616  // double frame
617  m_onsen_header.push_back(m_current_frame.size());
618  m_onsen_payload.push_back(m_current_frame);
619  }
620  }
621 
622  // loop for each DHE in system
623  // Run & TTT etc are zero until better idea
624 
625  if (isErrorIn(29)) dhe_active = 0; // dont send any DHE
626  for (int i = 0; i < 5; i++) {
627  if ((dhe_active & 0x1) or isErrorIn(28)) pack_dhe(dhe_ids[i], 0xF);
628  if (isErrorIn(71) && i == 2) {
629  pack_dhp(1, dhe_ids[i], 1);
630  }
631  dhe_active >>= 1;
632  }
633 
635 
636  if (isErrorIn(77)) {
637  // TODO add ROI Frame if header bit is set
638  int old = dhc_byte_count;
639  start_frame();
640  append_int32((EDHCFrameHeaderDataType::c_ONSEN_ROI << 27) | (m_trigger_nr & 0xFFFF));
642  dhc_byte_count = old; // dont count
643  }
644 
646  if (isErrorIn(75)) {
647  // add a faked DHC, "no data"
648  start_frame();
649  append_int32(EDHCFrameHeaderDataType::c_DHC_END << 27);
650  append_int32(0);
651  append_int32(0);
653  } else {
654  if (isErrorIn(31)) dhc_id += 1;
655  if (isErrorIn(33)) dhc_byte_count += 4;
656  unsigned int dlen = (dhc_byte_count / 4); // 32 bit words
657  start_frame();
658  append_int32((EDHCFrameHeaderDataType::c_DHC_END << 27) | ((dhc_id & 0xF) << 21) | (m_trigger_nr & 0xFFFF));
659  append_int32(dlen); // 32 bit word count
660  if (!isErrorIn(8)) append_int32(0x00000000); // Error Flags
661  if (!isErrorIn(14)) add_frame_to_payload();
662  if (isErrorIn(19)) {
663  // double frame
664  m_onsen_header.push_back(m_current_frame.size());
665  m_onsen_payload.push_back(m_current_frame);
666  }
667  }
668  if (isErrorIn(78)) {
669  // TODO add ROI Frame if header bit is set
670  int old = dhc_byte_count;
671  start_frame();
672  append_int32((EDHCFrameHeaderDataType::c_ONSEN_ROI << 27) | (m_trigger_nr & 0xFFFF));
674  dhc_byte_count = old; // dont count
675  }
676 
677  } else {
678  // add a faked DHC, "no data"
679  start_frame();
680  append_int32(EDHCFrameHeaderDataType::c_DHC_START << 27);
681  append_int16(0);
682  append_int16(0);
683  append_int16(0);
684  append_int16(0);
685  append_int16(0);
686  append_int16(0);
688 
689  start_frame();
690  append_int32(EDHCFrameHeaderDataType::c_DHC_END << 27);
691  append_int32(0);
692  append_int32(0);
694  }
695 }
696 
697 void PXDPackerErrModule::pack_dhe(int dhe_id, int dhp_active)
698 {
699  if (isErrorIn(37)) dhp_active = 0; // mark as no DHP, but send them (see below)
700  B2DEBUG(27, "PXD Packer Err --> pack_dhe ID " << dhe_id << " DHP act: " << dhp_active);
701  // dhe_id is not dhe_id ...
702  bool dhe_has_remapped = !m_InvertMapping;
703 
704  if (m_InvertMapping) {
705  // problem, we do not have an exact definition of if this bit is set in the new firmware and under which circumstances
706  // and its not clear if we have to translate the coordinates back to "DHP" layout! (look up tabel etc!)
707  B2FATAL("Inverse Mapping not implemented in Packer");
708  }
709 
710  if (isErrorIn(65)) dhe_id = 0x3F; // invalid
712  dhe_byte_count = 0;
713  start_frame();
714  uint32_t header = (EDHCFrameHeaderDataType::c_DHE_START << 27) | ((dhe_id & 0x3F) << 20) | ((dhp_active & 0xF) << 16) |
715  (m_trigger_nr & 0xFFFF);
716  if (isErrorIn(60)) header++;
717  append_int32(header);
718 
719  if (isErrorIn(35)) append_int16(0x1000);
720  else append_int16(m_trigger_nr >> 16); // Trigger Nr Hi
721  if (!isErrorIn(11)) {
722  append_int16(0x00000000); // DHE Timer Lo
723  }
724  if (!isErrorIn(9)) {
725  append_int16(0x00000000); // DHE Time Hi
726  append_int16(((m_trigger_dhp_framenr & 0x3F) << 10) |
727  (m_trigger_dhe_gate & 0xFF)); // Last DHP Frame Nr 15-10, Reserved 9-8, Trigger Offset 7-0
728  }
729  if (!isErrorIn(15)) add_frame_to_payload();
730  if (isErrorIn(20)) {
731  // double frame
732  m_onsen_header.push_back(m_current_frame.size());
733  m_onsen_payload.push_back(m_current_frame);
734  }
735 
736  // Now we add some undefined things
737  if (isErrorIn(46)) {
738  start_frame();
739  append_int32((EDHCFrameHeaderDataType::c_COMMODE << 27) | ((dhe_id & 0x3F) << 20) | (m_trigger_nr & 0xFFFF));
741  }
742  if (isErrorIn(47)) {
743  start_frame();
744  append_int32((EDHCFrameHeaderDataType::c_FCE_RAW << 27) | ((dhe_id & 0x3F) << 20) | (m_trigger_nr & 0xFFFF));
746  }
747  if (isErrorIn(48)) {
748  start_frame();
749  append_int32((EDHCFrameHeaderDataType::c_ONSEN_FCE << 27) | ((dhe_id & 0x3F) << 20) | (m_trigger_nr & 0xFFFF));
751  }
752  if (isErrorIn(49)) {
753  start_frame();
754  append_int32((EDHCFrameHeaderDataType::c_UNUSED_7 << 27) | ((dhe_id & 0x3F) << 20) | (m_trigger_nr & 0xFFFF));
756  }
757  if (isErrorIn(50)) {
758  start_frame();
759  append_int32((EDHCFrameHeaderDataType::c_UNUSED_8 << 27) | ((dhe_id & 0x3F) << 20) | (m_trigger_nr & 0xFFFF));
761  }
762  if (isErrorIn(51)) {
763  start_frame();
764  append_int32((EDHCFrameHeaderDataType::c_UNUSED_A << 27) | ((dhe_id & 0x3F) << 20) | (m_trigger_nr & 0xFFFF));
766  }
767 
768 // now prepare the data from one halfladder
769 // do the ROI selection??? optional...
770 // then loop for each DHP in system
771 // get active DHPs from a database?
772 // and pack data per halfladder.
773 // we fake the framenr and startframenr until we find some better solution
774 
775  if (dhp_active != 0) {
776 
778  bzero(halfladder_pixmap, sizeof(halfladder_pixmap));
779 
786  unsigned short sensor, ladder, layer;
787  sensor = (dhe_id & 0x1) + 1;
788  ladder = (dhe_id & 0x1E) >> 1; // no +1
789  layer = ((dhe_id & 0x20) >> 5) + 1;
790 
791  B2DEBUG(27, "pack_dhe: VxdId: " << VxdID(layer, ladder, sensor) << " " << (int)VxdID(layer, ladder, sensor));
792 
793  // Create some fixed hits (not too many, jut a few per ladder)
794  for (auto j = 0; j < 10; j++) {
795  unsigned int row, col;
796  unsigned char charge;
797  row = j * 23;
798  col = j * 23;
799  charge = 20 + j; // 0-255
800  if (!dhe_has_remapped) {
801  do_the_reverse_mapping(row, col, layer, sensor);
802  }
803  halfladder_pixmap[row][col] = charge;
804  }
805 
806  if (isErrorIn(38)) dhp_active = 0; // no DHP data even if we expect it
807  if (m_Clusterize) {
808  B2FATAL("Clusterizer not supported in Packer");
809  } else {
810  for (int i = 0; i < 4; i++) {
811  if ((dhp_active & 0x1) or isErrorIn(37)) {
812  pack_dhp(i, dhe_id, dhe_has_remapped ? 1 : 0);
814 // if (m_trigger_nr == 0x11) {
815 // pack_dhp_raw(i, dhe_id, false);
816 // pack_dhp_raw(i, dhe_id, true);
817 // }
818  }
819  dhp_active >>= 1;
820  }
821  }
822  }
823 
825  if (isErrorIn(32)) dhe_id += 1;
826  if (isErrorIn(34)) dhe_byte_count += 4;
827  unsigned int dlen = (dhe_byte_count / 2); // 16 bit words
828  start_frame();
829  header = (EDHCFrameHeaderDataType::c_DHE_END << 27) | ((dhe_id & 0x3F) << 20) | (m_trigger_nr & 0xFFFF);
830  if (isErrorIn(61)) header++;
831  if (isErrorIn(62)) header += 1 << 20;
832  if (isErrorIn(64)) header |= 0x80000000;
833  append_int32(header);
834  append_int16(dlen & 0xFFFF); // 16 bit word count
835  append_int16((dlen >> 16) & 0xFFFF); // 16 bit word count
836  if (!isErrorIn(10)) append_int32(0x00000000); // Error Flags
837  if (!isErrorIn(16)) add_frame_to_payload();
838  if (isErrorIn(21)) {
839  // double frame
840  m_onsen_header.push_back(m_current_frame.size());
841  m_onsen_payload.push_back(m_current_frame);
842  }
843 }
844 
845 void PXDPackerErrModule::do_the_reverse_mapping(unsigned int& /*row*/, unsigned int& /*col*/, unsigned short /*layer*/,
846  unsigned short /*sensor*/)
847 {
848  B2FATAL("code needs to be written");
849  // work to be done
850  //
851  // PXDMappingLookup::map_uv_to_rc_IF_OB(unsigned int& v_cellID, unsigned int& u_cellID, unsigned int& dhp_id, unsigned int dhe_ID)
852  // PXDMappingLookup::map_uv_to_rc_IB_OF(unsigned int& v_cellID, unsigned int& u_cellID, unsigned int& dhp_id, unsigned int dhe_ID)
853 }
854 
855 void PXDPackerErrModule::pack_dhp_raw(int chip_id, int dhe_id)
856 {
857  B2DEBUG(27, "PXD Packer Err --> pack_dhp Raw Chip " << chip_id << " of DHE id: " << dhe_id);
858  start_frame();
860  append_int32((EDHCFrameHeaderDataType::c_DHP_RAW << 27) | ((dhe_id & 0x3F) << 20) | ((chip_id & 0x03) << 16) |
861  (m_trigger_nr & 0xFFFF));
862  append_int32((EDHPFrameHeaderDataType::c_RAW << 29) | ((dhe_id & 0x3F) << 18) | ((chip_id & 0x03) << 16) |
863  (m_trigger_dhp_framenr & 0xFFFF));
864 
865  int c1, c2;
866  c1 = 64 * chip_id;
867  c2 = c1 + 64;
868  if (c2 >= PACKER_NUM_COLS) c2 = PACKER_NUM_COLS;
869 
870  // ADC data / memdump for pedestal calculation
871  for (int row = 0; row < PACKER_NUM_ROWS; row++) {
872  for (int col = c1; col < c2; col++) {
873  append_int8(halfladder_pixmap[row][col]);
874  }
875  // unconnected drain lines -> 0
876  for (int col = c2; col < c1 + 64; col++) {
877  append_int8(0);
878  }
879  }
880 
882 }
883 
884 void PXDPackerErrModule::pack_dhp(int chip_id, int dhe_id, int dhe_has_remapped)
885 {
886  B2DEBUG(27, "PXD Packer Err --> pack_dhp Chip " << chip_id << " of DHE id: " << dhe_id);
887  // remark: chip_id != port most of the time ...
888  bool empty = true;
889  unsigned short last_rowstart = 0;
890  bool error_done = false;
891 
892  if (dhe_has_remapped == 0) {
893  // problem, we do not have an exact definition of if this bit is set in the new firmware and under which circumstances
894  // and its not clear if we have to translate the coordinates back to "DHP" layout! (look up tabel etc!)
895  assert(dhe_has_remapped == 0);
896  }
897 
898  start_frame();
900  uint32_t header = (EDHCFrameHeaderDataType::c_DHP_ZSD << 27) | ((dhe_id & 0x3F) << 20) | ((dhe_has_remapped & 0x1) << 19) | ((
901  chip_id & 0x03) << 16) | (m_trigger_nr & 0xFFFF);
902  if (isErrorIn(63)) header += 1 << 20;
903  append_int32(header);
904 
905  if (isErrorIn(69)) {
907  return;
908  }
909 
910  if (isErrorIn(39)) dhe_id = 0; // mess up dhe_id in DHP header
911  if (isErrorIn(40)) chip_id = ~chip_id; // mess up chip id
912  header = (EDHPFrameHeaderDataType::c_ZSD << 29) | ((dhe_id & 0x3F) << 18) | ((chip_id & 0x03) << 16) |
913  (m_trigger_dhp_framenr & 0xFFFF);
914  if (isErrorIn(68)) header++;
915  append_int32(header);
916  if (isErrorIn(66)) append_int32(header + 1); // with inc trigger nr
917 
918  if (isErrorIn(41) or isErrorIn(42)) {
919  halfladder_pixmap[PACKER_NUM_ROWS - 1][PACKER_NUM_COLS - 1] = 0x42; // make sure we have a hit
920  }
921  for (int row = 0; row < PACKER_NUM_ROWS; row++) { // should be variable
922  bool rowstart;
923  if (isErrorIn(43) && !error_done) rowstart = false;
924  else rowstart = true;
925  int c1, c2;
926  c1 = 64 * chip_id;
927  c2 = c1 + 64;
928  if (c2 >= PACKER_NUM_COLS) c2 = PACKER_NUM_COLS;
929  for (int col = c1; col < c2; col++) {
930  if (halfladder_pixmap[row][col] != 0) {
931  unsigned char charge;
932  charge = halfladder_pixmap[row][col] & 0xFF; // before we make overflow error
933  if (isErrorIn(41) and row == PACKER_NUM_ROWS - 1 and col == PACKER_NUM_COLS - 1 and !error_done) {
934  row = PACKER_NUM_ROWS;
935  rowstart = true; // force a new row
936  error_done = true;
937  }
938  if (isErrorIn(42) and row == PACKER_NUM_ROWS - 1 and col == PACKER_NUM_COLS - 1 and !error_done) {
939  col = PACKER_NUM_COLS; // masked out to modulo 64 anway
940  error_done = true;
941  }
942  if (rowstart) {
943  last_rowstart = ((row & 0x3FE) << (6 - 1)) | 0; // plus common mode 6 bits ... set to 0
944  append_int16(last_rowstart);
945  rowstart = false;
946  }
947  int colout = col;
948  if (!isErrorIn(52)) append_int16(0x8000 | ((row & 0x1) << 14) | ((colout & 0x3F) << 8) | charge);
949  empty = false;
950  }
951  }
952  }
953  if (!empty && (m_current_frame.size() & 0x3)) {
954  B2DEBUG(27, "Repeat last rowstart to align to 32bit.");
955  append_int16(last_rowstart);
956  }
957 
958 
959  if (empty) {
960  B2DEBUG(27, "Found no data for halfladder! DHEID: " << dhe_id << " Chip: " << chip_id);
961  // we DROP the frame, thus we have to correct DHE and DHC counters
962  dhc_byte_count -= 8; // fixed size of Header
963  dhe_byte_count -= 8; // fixed size of Header
964  start_frame();
966  append_int32((EDHCFrameHeaderDataType::c_GHOST << 27) | ((dhe_id & 0x3F) << 20) | ((chip_id & 0x03) << 16) |
967  (m_trigger_nr & 0xFFFF));
968  } else {
969  //B2DEBUG(20,"Found data for halfladder DHEID: " << dhe_id << " Chip: " << chip_id);
970  }
972 
973 }
974 
976 {
977  if (m_real_trigger_nr == enr) return true; // oder modulo, oder oder
978  return false;
979 }
Belle2::PXD::PXDPackerErrModule::m_current_frame
std::vector< unsigned char > m_current_frame
For current processed frames.
Definition: PXDPackerErrModule.h:104
Belle2::PXD::PXDPackerErrModule::initialize
void initialize() override final
Initialize the module.
Definition: PXDPackerErrModule.cc:270
Belle2::PXD::PXDPackerErrModule::m_real_trigger_nr
unsigned int m_real_trigger_nr
Real Trigger Nr.
Definition: PXDPackerErrModule.h:79
Belle2::PXD::PXDPackerErrModule::pack_dhp_raw
void pack_dhp_raw(int dhp_id, int dhe_id)
Pack one DHP RAW to buffer.
Definition: PXDPackerErrModule.cc:855
Belle2::VxdID
Class to uniquely identify a any structure of the PXD and SVD.
Definition: VxdID.h:43
Belle2::Module::setDescription
void setDescription(const std::string &description)
Sets the description of the module.
Definition: Module.cc:216
REG_MODULE
#define REG_MODULE(moduleName)
Register the given module (without 'Module' suffix) with the framework.
Definition: Module.h:652
Belle2::Module::c_ParallelProcessingCertified
@ c_ParallelProcessingCertified
This module can be run in parallel processing mode safely (All I/O must be done through the data stor...
Definition: Module.h:82
Belle2::PXD::PXDPackerErrModule::pack_dhp
void pack_dhp(int dhp_id, int dhe_id, int dhe_reformat)
Pack one DHP to buffer.
Definition: PXDPackerErrModule.cc:884
Belle2::PXD::PXDPackerErrModule::CheckErrorMaskInEvent
bool CheckErrorMaskInEvent(unsigned int eventnr, PXDError::PXDErrorFlags mask)
Definition: PXDPackerErrModule.cc:211
Belle2::PXD::dhc_crc_32_type
boost::crc_optimal< 32, 0x04C11DB7, 0, 0, false, false > dhc_crc_32_type
define our CRC function
Definition: PXDRawDataStructs.cc:41
Belle2::PXD::PXDPackerErrModule::isErrorIn
bool isErrorIn(uint32_t enr)
Check if we want this type of error in this event.
Definition: PXDPackerErrModule.cc:975
Belle2::Module
Base class for Modules.
Definition: Module.h:74
Belle2::Module::setPropertyFlags
void setPropertyFlags(unsigned int propertyFlags)
Sets the flags for the module properties.
Definition: Module.cc:210
Belle2::PXD::PXDPackerErrModule::m_trigger_dhp_framenr
unsigned int m_trigger_dhp_framenr
DHP Readout Frame Nr for DHP and DHE headers.
Definition: PXDPackerErrModule.h:90
Belle2::PXD::PXDPackerErrModule::terminate
void terminate() override final
Terminate the module.
Definition: PXDPackerErrModule.cc:328
Belle2::PXD::PXDPackerErrModule::m_onsen_header
std::vector< unsigned int > m_onsen_header
For one DHC event, we utilize one header (writing out, beware of endianess!)
Definition: PXDPackerErrModule.h:98
Belle2::PXD
Namespace to encapsulate code needed for simulation and reconstrucion of the PXD.
Definition: PXDCalibrationUtilities.h:28
Belle2
Abstract base class for different kinds of events.
Definition: MillepedeAlgorithm.h:19
Belle2::StoreObjPtr
Type-safe access to single objects in the data store.
Definition: ParticleList.h:33
Belle2::PXD::PXDPackerErrModule::pack_dhe
void pack_dhe(int dhe_id, int dhp_mask)
Pack one DHE (several DHP) to buffer.
Definition: PXDPackerErrModule.cc:697
Belle2::PXD::PXDPackerErrModule::m_run_nr_word2
unsigned short m_run_nr_word2
Exp+Run Nr.
Definition: PXDPackerErrModule.h:85
Belle2::PXD::PXDPackerErrModule::m_trigger_dhe_gate
unsigned int m_trigger_dhe_gate
DHE Trigger Gate for DHE headers.
Definition: PXDPackerErrModule.h:92
Belle2::PXD::PXDPackerErrModule::event
void event() override final
do the packing
Definition: PXDPackerErrModule.cc:347
Belle2::PXD::PXDPackerErrModule::m_dhe_to_dhc
std::vector< std::vector< int > > m_dhe_to_dhc
Parameter dhc<->dhe list, mapping from steering file.
Definition: PXDPackerErrModule.h:71
Belle2::PXD::PXDPackerErrModule::m_run_nr_word1
unsigned short m_run_nr_word1
Run+Subrun Nr.
Definition: PXDPackerErrModule.h:83
Belle2::PXD::PXDPackerErrModule::m_errors
static std::vector< PXDErrorFlags > m_errors
The pxd error flags.
Definition: PXDPackerErrModule.h:157
Belle2::PXD::PXDPackerErrModule::m_InvertMapping
bool m_InvertMapping
Flag if we invert mapping to DHP row/col or use premapped coordinates.
Definition: PXDPackerErrModule.h:65
Belle2::PXD::PXDPackerErrModule::m_PXDDAQEvtStatsName
std::string m_PXDDAQEvtStatsName
The name of the StoreObjPtr of PXDDAQStatus to be read.
Definition: PXDPackerErrModule.h:68
Belle2::PXD::PXDPackerErrModule::m_trigger_nr
unsigned int m_trigger_nr
Trigger Nr.
Definition: PXDPackerErrModule.h:81
Belle2::PXD::PXDPackerErrModule::m_storeRaws
StoreArray< RawPXD > m_storeRaws
Output array for RawPxds.
Definition: PXDPackerErrModule.h:107
Belle2::PXD::PXDPackerErrModule::dhe_byte_count
unsigned int dhe_byte_count
Byte count in current DHE package.
Definition: PXDPackerErrModule.h:151
Belle2::Module::addParam
void addParam(const std::string &name, T &paramVariable, const std::string &description, const T &defaultValue)
Adds a new parameter to the module.
Definition: Module.h:562
Belle2::PXD::PXDPackerErrModule::start_frame
void start_frame(void)
Start with a new Frame.
Definition: PXDPackerErrModule.cc:524
Belle2::PXD::PXDPackerErrModule::dhc_byte_count
unsigned int dhc_byte_count
Byte count in current DHC package.
Definition: PXDPackerErrModule.h:152
Belle2::PXD::PXDPackerErrModule::append_int16
void append_int16(unsigned short w)
cat 16bit value to frame
Definition: PXDPackerErrModule.cc:496
Belle2::PXD::PXDPackerErrModule::halfladder_pixmap
unsigned char halfladder_pixmap[PACKER_NUM_ROWS][PACKER_NUM_COLS]
temporary hitmap buffer for pixel to raw data conversion
Definition: PXDPackerErrModule.h:149
Belle2::PXD::PXDPackerErrModule::m_RawPXDsName
std::string m_RawPXDsName
The name of the StoreArray of generated RawPXDs.
Definition: PXDPackerErrModule.h:63
Belle2::PXD::PXDPackerErrModule::add_frame_to_payload
void add_frame_to_payload(void)
Add Frame to Event payload.
Definition: PXDPackerErrModule.cc:473
Belle2::PXD::PXDPackerErrModule::m_Clusterize
bool m_Clusterize
Use clusterizer (FCE format)
Definition: PXDPackerErrModule.h:66
Belle2::PXD::PXDPackerErrModule::append_int8
void append_int8(unsigned char w)
cat 8bit value to frame
Definition: PXDPackerErrModule.cc:489
Belle2::PXD::PXDPackerErrModule::m_meta_time
unsigned long long int m_meta_time
Time(Tag) from MetaInfo.
Definition: PXDPackerErrModule.h:87
Belle2::PXD::PXDPackerErrModule::pack_dhc
void pack_dhc(int dhc_id, int dhe_mask, int *dhe_ids)
Pack one DHC (several DHE) stored in one RawPXD object.
Definition: PXDPackerErrModule.cc:529
Belle2::PXD::PXDPackerErrModule::pack_event
void pack_event(void)
Pack one event (several DHC) stored in seperate RawPXD object.
Definition: PXDPackerErrModule.cc:389
Belle2::PXD::PXDPackerErrModule::m_found_fatal
bool m_found_fatal
flag if we found one test failing
Definition: PXDPackerErrModule.h:95
Belle2::PXD::PXDPackerErrModule::m_daqStatus
StoreObjPtr< PXDDAQStatus > m_daqStatus
Output array for RawPxds.
Definition: PXDPackerErrModule.h:110
Belle2::PXD::PXDPackerErrModule::m_packed_events
unsigned int m_packed_events
Event counter.
Definition: PXDPackerErrModule.h:77
Belle2::PXD::PXDPackerErrModule::m_onsen_payload
std::vector< std::vector< unsigned char > > m_onsen_payload
For one DHC event, we utilize one payload for all DHE/DHP frames.
Definition: PXDPackerErrModule.h:101
Belle2::PXD::PXDPackerErrModule::m_Check
bool m_Check
false=Pack Raw Data, true=Check unpacked result
Definition: PXDPackerErrModule.h:67
Belle2::PXD::PXDPackerErrModule::append_int32
void append_int32(unsigned int w)
cat 32value value to frame
Definition: PXDPackerErrModule.cc:504
Belle2::PXD::PXDPackerErrModule::m_dhc_mapto_dhe
std::map< int, std::vector< int > > m_dhc_mapto_dhe
mapping calculated from m_dhe_to_dhc for easier handling
Definition: PXDPackerErrModule.h:74