Belle II Software development
CDCTriggerTSFModule.cc
1/**************************************************************************
2 * basf2 (Belle II Analysis Software Framework) *
3 * Author: The Belle II Collaboration *
4 * *
5 * See git log for contributors and copyright holders. *
6 * This file is licensed under LGPL-3.0, see LICENSE.md. *
7 **************************************************************************/
8#include "trg/cdc/modules/trgcdc/CDCTriggerTSFModule.h"
9
10#include <cdc/dataobjects/CDCSimHit.h>
11#include <cdc/dataobjects/CDCRawHit.h>
12#include <cdc/dataobjects/WireID.h>
13#include <mdst/dataobjects/MCParticle.h>
14
15#include <cdc/geometry/CDCGeometryPar.h>
16#include <trg/cdc/Layer.h>
17#include <trg/cdc/Wire.h>
18#include <trg/cdc/WireHit.h>
19#include <trg/cdc/Segment.h>
20#include <tracking/dataobjects/RecoTrack.h>
21
22#include <fstream>
23
24#define P3D HepGeom::Point3D<double>
25
26using namespace std;
27using namespace Belle2;
28
29//this line registers the module with the framework and actually makes it available
30//in steering files or the the module list (basf2 -m).
31REG_MODULE(CDCTriggerTSF);
32
34{
36 "The Track Segment Finder module of the CDC trigger.\n"
37 "Combines CDCHits from the same super layer to CDCTriggerSegmentHits.\n"
38 );
40 addParam("CDCHitCollectionName",
42 "Name of the input StoreArray of CDCHits.",
43 string("CDCHits4Trg"));
44 addParam("TSHitCollectionName",
46 "Name of the output StoreArray of CDCTriggerSegmentHits.",
47 string(""));
48 addParam("InnerTSLUTFile",
50 "The filename of LUT for track segments from the inner-most super layer",
51 string(""));
52 addParam("OuterTSLUTFile",
54 "The filename of LUT for track segments from the outer super layers",
55 string(""));
56 addParam("ClockSimulation",
58 "Switch to simulate each data clock cycle separately.",
59 false);
60 addParam("makeTrueLRTable",
62 "Switch to create a table of hit pattern <-> "
63 "number of true left / true right, which is needed to create the LUT",
64 false);
65 addParam("makeRecoLRTable",
66 m_makeRecoLRTable,
67 "Switch to create a table of hit pattern <-> "
68 "number of reconstructed left / true right, which is needed to create the LUT",
69 false);
70 addParam("innerTrueLRTableFilename",
72 "Filename for the true left/right table for the innermost super layer.",
73 string("innerTrueLRTable.dat"));
74 addParam("outerTrueLRTableFilename",
76 "Filename for the true left/right table for the outer super layers.",
77 string("outerTrueLRTable.dat"));
78 addParam("Deadchannel",
80 "Mask dead channels based on database. True:mask False:unmask",
81 true);
82 addParam("Crosstalk_tdcfilter",
84 "TDC based crosstalk filtering logic on CDCFE. True:enable False:disable",
85 false);
86 addParam("innerRecoLRTableFilename",
88 "Filename for the reconnstructed left/right table for the innermost super layer.",
89 string("innerRecoLRTable.dat"));
90 addParam("outerRecoLRTableFilename",
92 "Filename for the reconstructed left/right table for the outer super layers.",
93 string("outerRecoLRTable.dat"));
94 addParam("relateAllHits",
96 "Flag to relate all cdchits to the TrackSegment, not just the priority hits.",
97 true);
98 addParam("ADC_cut_enable",
100 "remove hits with lower ADC than cut threshold. True:enable False:disable",
101 false);
102 addParam("ADC_cut_threshold",
103 m_adccut,
104 "Threshold for the adc cut for all wires used for TSF. Default: -1",
105 -1);
106 addParam("SaveADC",
107 m_saveadc,
108 "Flag to save ADC for other trg module or not, Default: false",
109 false);
110 addParam("ADCflag_low",
112 "Assign ADC based flag for full hit tracker. Lower threshold of ADC.",
113 10);
114 addParam("ADCflag_high",
116 "Assign ADC based flag for full hit tracker. Higher threshold of ADC.",
117 10000);
118 addParam("useDB", m_useDB,
119 "Switch to use database to load run dependent parameters. ", true);
120}
121
122void
124{
125 // register DataStore elements
126 m_segmentHits.registerInDataStore(m_TSHitCollectionName);
128 if (m_makeTrueLRTable) {
129 StoreArray<CDCSimHit> simhits;
130 simhits.isRequired();
131 innerTrueLRTable.assign(pow(2, 16), vector<unsigned>(5, 0));
132 outerTrueLRTable.assign(pow(2, 12), vector<unsigned>(5, 0));
133 }
134 if (m_makeRecoLRTable) {
135 m_recoTracks.isRequired("RecoTracks");
136 m_cdcHits.isRequired();
137 innerRecoLRTable.assign(pow(2, 16), vector<unsigned>(5, 0));
138 outerRecoLRTable.assign(pow(2, 12), vector<unsigned>(5, 0));
139 }
140 // register relations
141 StoreArray<MCParticle> mcparticles;
142 m_segmentHits.registerRelationTo(m_cdcHits);
144 m_recoTracks.registerRelationTo(m_segmentHits);
145 m_recoTracks.registerRelationTo(m_cdcHits);
146 m_segmentHits.registerRelationTo(m_recoTracks);
147 // Prepare track segment shapes.
148 // First a structure of wires is created for all layers and super layers.
149 // Each track segment consists of pointers to wires in this structure.
151 const unsigned nLayers = cdc.nWireLayers();
152 TRGClock* clockTDC = new TRGClock("CDCTrigger TDC clock", 0, 500. / cdc.getTdcBinWidth());
153 TRGClock* clockData = new TRGClock("CDCTrigger data clock", *clockTDC, 1, 16);
154 clocks.push_back(clockTDC);
155 clocks.push_back(clockData);
156
157 //...Loop over layers...
158 int superLayerId = -1;
159 unsigned lastNWires = 0;
160 int lastShifts = -1000;
161 // separate counters for axial and stereo layers and super layers
162 int ia = -1;
163 int is = -1;
164 int ias = -1;
165 int iss = -1;
166 unsigned axialStereoLayerId;
167 unsigned axialStereoSuperLayerId = 0;
168 unsigned nWires = 0;
169 for (unsigned i = 0; i < nLayers; i++) {
170 if (i < cdc.getOffsetOfFirstLayer()) {
171 continue;
172 }
173 const unsigned nWiresInLayer = cdc.nWiresInLayer(i);
174
175 //...Axial or stereo?...
176 int nShifts = cdc.nShifts(i);
177 bool axial = (nShifts == 0);
178 if (axial) ++ia;
179 else ++is;
180 axialStereoLayerId = (axial) ? ia : is;
181
182 // Add empty TRGCDCLayer in case a superlayer is not present
183 if (superLayers.size() == 0 and cdc.getOffsetOfFirstSuperLayer() != 0) {
184 for (uint superLayerOffset = 0; superLayerOffset < cdc.getOffsetOfFirstSuperLayer(); superLayerOffset++) {
185 superLayers.push_back(vector<TRGCDCLayer*>());
186 superLayerId++;
187 }
188 }
189
190 //...Is this in a new super layer?...
191 if ((lastNWires != nWiresInLayer) || (lastShifts != nShifts)) {
192 ++superLayerId;
193 superLayers.push_back(vector<TRGCDCLayer*>());
194 if (axial) ++ias;
195 else ++iss;
196 axialStereoSuperLayerId = (axial) ? ias : iss;
197 lastNWires = nWiresInLayer;
198 lastShifts = nShifts;
199 }
200
201 //...Calculate radius of adjacent field wires...
202 const float swr = cdc.senseWireR(i);
203 const float innerRadius = cdc.fieldWireR(i - 1);
204 const float outerRadius = (i < nLayers - 1) ?
205 cdc.fieldWireR(i) :
206 swr + (swr - innerRadius);
207
208 //...New layer...
209 TRGCDCLayer* layer = new TRGCDCLayer(i,
210 superLayerId,
211 superLayers[superLayerId].size(),
212 axialStereoLayerId,
213 axialStereoSuperLayerId,
214 cdc.zOffsetWireLayer(i),
215 nShifts,
216 M_PI * swr * swr / nWiresInLayer,
217 nWiresInLayer,
218 innerRadius,
219 outerRadius);
220 superLayers.back().push_back(layer);
221
222 //...Loop over all wires in a layer...
223 for (unsigned j = 0; j < nWiresInLayer; j++) {
224 const P3D fp = P3D(cdc.wireForwardPosition(i, j).x(),
225 cdc.wireForwardPosition(i, j).y(),
226 cdc.wireForwardPosition(i, j).z());
227 const P3D bp = P3D(cdc.wireBackwardPosition(i, j).x(),
228 cdc.wireBackwardPosition(i, j).y(),
229 cdc.wireBackwardPosition(i, j).z());
230 TRGCDCWire* tw = new TRGCDCWire(nWires++, j, *layer, fp, bp, *clockTDC);
231 layer->push_back(tw);
232 }
233 }
234
235 //...Make TSF's...
236 const unsigned nWiresInTS[2] = {15, 11};
237 const int shape[2][30] = {
238 {
239 -2, 0, // relative layer id, relative wire id
240 -1, -1,
241 -1, 0,
242 0, -1,
243 0, 0,
244 0, 1,
245 1, -2,
246 1, -1,
247 1, 0,
248 1, 1,
249 2, -2,
250 2, -1,
251 2, 0,
252 2, 1,
253 2, 2
254 },
255 {
256 -2, -1,
257 -2, 0,
258 -2, 1,
259 -1, -1,
260 -1, 0,
261 0, 0,
262 1, -1,
263 1, 0,
264 2, -1,
265 2, 0,
266 2, 1,
267 0, 0,
268 0, 0,
269 0, 0,
270 0, 0
271 }
272 };
273 const int layerOffset[2] = {5, 2};
274 unsigned id = 0;
275 unsigned idTS = 0;
276 for (unsigned i = 0; i < superLayers.size(); i++) {
277 if (i < cdc.getOffsetOfFirstSuperLayer()) {
278 TRGCDCLayer* emptylayer = new TRGCDCLayer();
279 tsLayers.push_back(emptylayer);
280 continue;
281 }
282 unsigned tsType = (i) ? 1 : 0;
283
284 //...TS layer... w is a central wire
285 const TRGCDCCell* ww = superLayers[i][layerOffset[tsType]]->front();
286 TRGCDCLayer* layer = new TRGCDCLayer(id++, *ww);
287 tsLayers.push_back(layer);
288
289 //...Loop over all wires in a central wire layer...
290 const unsigned nWiresInLayer = ww->layer().nCells();
291 B2DEBUG(100, "SL " << i << " layerOffset " << layerOffset[tsType] << ", "
292 << superLayers[i].size() << " layers, " << nWiresInLayer << " wires");
293 for (unsigned j = 0; j < nWiresInLayer; j++) {
294 const TRGCDCWire& w =
295 (TRGCDCWire&) superLayers[i][layerOffset[tsType]]->cell(j);
296
297 const unsigned localId = w.localId();
298 const unsigned layerId = w.localLayerId();
299 vector<const TRGCDCWire*> cells;
300
301 B2DEBUG(110, "TS localId " << localId << " layerId " << layerId);
302
303 for (unsigned k = 0; k < nWiresInTS[tsType]; k++) {
304 const int laid = layerId + shape[tsType][k * 2];
305 const int loid = localId + shape[tsType][k * 2 + 1];
306
307 B2DEBUG(120, "cell localId " << loid << " layerId " << laid);
308
309 const TRGCDCWire& c =
310 (TRGCDCWire&) superLayers[i][laid]->cell(loid);
311
312 cells.push_back(&c);
313 }
314
315 TRGCDCSegment* ts;
316 if (w.superLayerId()) {
317 ts = new TRGCDCSegment(idTS++,
318 *layer,
319 w,
320 *clockData,
322 cells);
323 } else {
324 ts = new TRGCDCSegment(idTS++,
325 *layer,
326 w,
327 *clockData,
329 cells);
330 }
331 ts->initialize();
332 layer->push_back(ts);
333 }
334 }
335
336}
337
338void
340{
341 if (m_deadchflag) {
342 if (not m_db_deadchannel.isValid()) {
343 StoreObjPtr<EventMetaData> evtMetaData;
344 B2ERROR("No database for CDCTRG dead channel mapping. Channel masking is skipped. exp " << evtMetaData->getExperiment() << " run "
345 << evtMetaData->getRun());
346 for (unsigned int i = 0; i < c_nSuperLayers; i++) { //SL
347 for (unsigned int j = 0; j < MAX_N_LAYERS; j++) { //Layer
348 for (unsigned int k = 0; k < c_maxNDriftCells; k++) { //
349 deadch_map[i][j][k] = true;
350 }
351 }
352 }
353 } else {
354 for (unsigned int i = 0; i < c_nSuperLayers; i++) { //SL
355 for (unsigned int j = 0; j < MAX_N_LAYERS; j++) { //Layer
356 for (unsigned int k = 0; k < c_maxNDriftCells; k++) { //
357 deadch_map[i][j][k] = m_db_deadchannel->getdeadch(i, j, k);
358 }
359 }
360 }
361 }
362 }
363
364 if (m_useDB) {
365 if (not m_cdctrgtsf_DB.isValid()) {
366 StoreObjPtr<EventMetaData> evtMetaData;
367 B2FATAL("No database for CDCTRG TSF parameter. exp " << evtMetaData->getExperiment() << " run "
368 << evtMetaData->getRun());
369 } else {
370 m_adcflag = m_cdctrgtsf_DB->getuseADC();
371 m_adccut = m_cdctrgtsf_DB->getADC_threshold();
372 m_adcflag_low = m_cdctrgtsf_DB->getADC_threshold();
373 m_crosstalk_tdcfilter = m_cdctrgtsf_DB->getuseTDCfilter();
374 }
375 }
376}
377
378void
380{
382
383 // fill CDCHits into track segment shapes
384
385 //crosstalk filter
386 vector<int> filtered_hit;
387 for (int i = 0; i < m_cdcHits.getEntries(); ++i) {
388 filtered_hit.push_back(0);
389 }
390
392 //check number of hits in each asic
393 int ncdchit_asic[500][6] = {{0}};
394 vector<int> id_ncdchit_asic[500][6];
395 for (int i = 0; i < m_cdcHits.getEntries(); ++i) {
396 UChar_t lay = m_cdcHits[i]->getICLayer();
397 UShort_t IWire = m_cdcHits[i]->getIWire();
398 WireID wireid(lay, IWire);
399 int boardid = cdc.getBoardID(wireid);
400 int fechid = cdc.getChannelID(wireid);
401 int asicid = fechid / 8;
402 if (boardid >= 0 && boardid < 500 && asicid >= 0 && asicid < 6) {
403 ncdchit_asic[boardid][asicid]++;
404 id_ncdchit_asic[boardid][asicid].push_back(i);
405 }
406 }
407 //check 16ns time coincidence if >=4 hits are found in the same asic
408 for (int i = 0; i < 500; i++) {
409 for (int j = 0; j < 6; j++) {
410 if (ncdchit_asic[i][j] >= 4) {
411 std::vector<short> tdc_asic;
412 for (int k = 0; k < ncdchit_asic[i][j]; k++) {
413 short tdc = m_cdcHits[id_ncdchit_asic[i][j][k]]->getTDCCount();
414 tdc_asic.push_back(tdc);
415 }
416 std::sort(tdc_asic.begin(), tdc_asic.end());
417 for (int ncoin = ncdchit_asic[i][j]; ncoin >= 4; ncoin--) {
418 bool breakOuterLoop = false;
419 for (int k = 0; k < ncdchit_asic[i][j] - ncoin; k++) {
420 if (tdc_asic[k + ncoin - 1] - tdc_asic[k] <= 16) {
421 for (int l = k; l < k + ncoin - 1; l++) {
422 filtered_hit[id_ncdchit_asic[i][j][l]] = 1;
423 }
424 breakOuterLoop = true;
425 break;
426 }
427 }
428 if (breakOuterLoop)
429 break;
430 }
431 tdc_asic.clear();
432 }
433 }
434 }
435 }
436
437 //...Loop over CDCHits...
438 for (int i = 0; i < m_cdcHits.getEntries(); ++i) {
439 // get the wire
440 const CDCHit& h = *m_cdcHits[i];
441 // mask dead channel
442 if (m_deadchflag) {
443 if (!deadch_map[h.getISuperLayer()][h.getILayer()][h.getIWire()]) {
444 continue;
445 }
446 }
447 // skim crosstalk hit
448 if (filtered_hit[i] == 1)continue;
449 // select fixed timing window
450 if (h.getTDCCount() < 4450 || h.getTDCCount() > 4950)continue;
451
452 // remove hits with low ADC
453 if (m_adcflag) {
454 if (h.getADCCount() < m_adccut)continue;
455 }
456
457 TRGCDCWire& w =
458 (TRGCDCWire&) superLayers[h.getISuperLayer()][h.getILayer()]->cell(h.getIWire());
459
460 // trigger timing signal
461 const int tdcCount = floor((cdc.getT0(WireID(h.getID())) / cdc.getTdcBinWidth()
462 - h.getTDCCount() + 0.5) / 2);
463 TRGTime rise = TRGTime(tdcCount, true, w.signal().clock(), w.name());
464 TRGTime fall = rise;
465 fall.shift(1).reverse();
466 TRGSignal signal = rise & fall;
467 w.addSignal(signal);
468
469 if (h.getADCCount() > m_adcflag_low && h.getADCCount() < m_adcflag_high) {
470 w.addSignal_adc(signal);
471 }
472
473 if (w.hit()) continue;
474 // make a trigger wire hit (needed for relations)
475 // all unneeded variables are set to 0 (TODO: remove them completely?)
476 TRGCDCWireHit* hit = new TRGCDCWireHit(w, i,
477 0, 0, 0, 0, 0, 0, 0, 0);
478 w.hit(hit);
479 }
480
481
482
483 // neighbor suppression
484 unsigned neibor_hit[10][1000] = {};
485 for (unsigned isl = 0; isl < tsLayers.size(); ++isl) {
486 for (unsigned its = 0; its < tsLayers[isl]->nCells(); ++its) {
487 TRGCDCSegment& s = (TRGCDCSegment&) tsLayers[isl]->cell(its);
488 // simulate with logicLUTFlag = true
489 // TODO: either add parameter or remove the option in Segment::simulate()
490 s.simulate(m_clockSimulation, true,
492 if (!m_clockSimulation && s.signal().active() && s.priorityPosition() == 3) {
493 neibor_hit[isl][its] = 1;
494 }
495 }
496 }
497
498 // simulate track segments and create track segment hits
499 for (unsigned isl = 0; isl < tsLayers.size(); ++isl) {
500 for (unsigned its = 0; its < tsLayers[isl]->nCells(); ++its) {
501 TRGCDCSegment& s = (TRGCDCSegment&) tsLayers[isl]->cell(its);
502 // simulate with logicLUTFlag = true
503 // TODO: either add parameter or remove the option in Segment::simulate()
504 s.simulate(m_clockSimulation, true,
506 // store hits and create relations
507 // for clock simulation already done in simulate
508 // TODO: move it to simulate also for simulateWithoutClock?
509 if (!m_clockSimulation && s.signal().active()) {
510
511 //neighbor suppression
512 if (s.priorityPosition() != 3 && (neibor_hit[isl][(its - 1) % tsLayers[isl]->nCells()] == 1
513 || neibor_hit[isl][(its + 1) % tsLayers[isl]->nCells()] == 1))continue;
514
515 const CDCHit* priorityHit = m_cdcHits[s.priority().hit()->iCDCHit()];
516
517 /* generate ADC Pattern for NN*/
518 std::vector<float> fullADC = {};
519 if (m_saveadc) {
520 int nwires = (isl == 0) ? 15 : 11;
521 for (int iwire = 0; iwire < nwires; iwire++) {
522 if (!s[iwire] || !(s[iwire]->hit())) { //Make sure the wire do exist
523 fullADC.push_back(-1);
524 continue;
525 }
526 const CDCHit* cdchit0 = m_cdcHits[s[iwire]->hit()->iCDCHit()];
527 fullADC.push_back(cdchit0->getADCCount());
528 }
529 }
530 const CDCTriggerSegmentHit* tsHit =
531 m_segmentHits.appendNew(*priorityHit,
532 s.id(),
533 s.priorityPosition(),
534 s.LUT()->getValue(s.lutPattern()),
535 s.priorityTime(),
536 s.fastestTime(),
537 s.foundTime(),
538 -1,
539 s.hitPatternTime(),
540 s.hitPattern(),
541 fullADC,
542 s.hitPattern_adc());
543 unsigned short adcSum = 0;
544 // relation to all CDCHits in segment
545 for (unsigned iw = 0; iw < s.wires().size(); ++iw) {
546 const TRGCDCWire* wire = (TRGCDCWire*)s[iw];
547 if (wire->signal().active()) {
548 // priority wire has relation weight 2
549 double weight = (wire == &(s.priority())) ? 2. : 1.; // not sure if this is needed..
550 if (weight == 2. || m_relateAllHits) {
551 tsHit->addRelationTo(m_cdcHits[wire->hit()->iCDCHit()], weight);
552 adcSum += m_cdcHits[wire->hit()->iCDCHit()]->getADCCount();
553 }
554 }
555 }
556 // relation to MCParticles (same as priority hit)
558 for (unsigned imc = 0; imc < mcrel.size(); ++imc) {
559 mcrel[imc]->addRelationTo(tsHit, mcrel.weight(imc));
560 }
561 // get true left/right
562 if (m_makeTrueLRTable) {
563 const CDCSimHit* simHit = priorityHit->getRelatedFrom<CDCSimHit>();
564 if (simHit && !simHit->getBackgroundTag()) {
565 if (isl == 0) {
566 B2DEBUG(100, its << " creating entry in TrueLUT for pattern: " << s.lutPattern() << " : " << simHit->getLeftRightPassage());
567 innerTrueLRTable[s.lutPattern()][simHit->getLeftRightPassage()] += 1;
568 innerTrueLRTable[s.lutPattern()][3] += tsHit->priorityTime();
569 innerTrueLRTable[s.lutPattern()][4] += adcSum;
570 } else {
571 outerTrueLRTable[s.lutPattern()][simHit->getLeftRightPassage()] += 1;
572 outerTrueLRTable[s.lutPattern()][3] += tsHit->priorityTime();
573 outerTrueLRTable[s.lutPattern()][4] += adcSum;
574 B2DEBUG(100, its << " creating entry in TrueLUT for pattern: " << s.lutPattern() << " : " << simHit->getLeftRightPassage());
575 }
576 } else {
577 if (isl == 0) {
578 B2DEBUG(100, its << " creating bghit in TrueLUT for pattern: " << s.lutPattern());
579 innerTrueLRTable[s.lutPattern()][2] += 1;
580 innerTrueLRTable[s.lutPattern()][3] += tsHit->priorityTime();
581 innerTrueLRTable[s.lutPattern()][4] += adcSum;
582 } else {
583 B2DEBUG(100, its << " creating bghit in TrueLUT for pattern: " << s.lutPattern());
584 outerTrueLRTable[s.lutPattern()][2] += 1;
585 outerTrueLRTable[s.lutPattern()][3] += tsHit->priorityTime();
586 outerTrueLRTable[s.lutPattern()][4] += adcSum;
587 }
588 }
589 }
590
591 if (m_makeRecoLRTable) {
592 // for the recotable, we have no simhits and w can have more than one recotrack per event
593 // so we need to loop over them:
594 unsigned lrflag = 2; // see explanation below
595 for (int ireco = 0; ireco < m_recoTracks.getEntries(); ++ireco) {
596 // std::cout << "recotrack " << ireco << " of " << m_recoTracks.getEntries());
597 RecoTrack* recoTrack = m_recoTracks[ireco];
598 // since there is no relation between recotracks and the tshits yet, we need to create them first.
599 // within the recotrack class, there is a function which returns the hitids of the cdchits used
600 // in the recotrack. now we can loop over them and compare them with the id from the priorityhit:
601 // /
602 // Before looping over the recotracks, we set the rl information to 'bkg hit'. Then, we loop over all
603 // recotracks and determine if there is a relation and whether it passed left or right. If this is set for
604 // one recotrack, we set the rl information to the corresponding value. if it is set for another recotrack,
605 // we will also use this information for the recolrtable and set the corresponding value again.
606 // Just in the case, where after the loop over all recotracks it wasn't related to any of them, we will set
607 // the background flag in the recolrtable.
608 vector<CDCHit*> cdcHits = recoTrack->getCDCHitList();
609 bool related = false;
610 for (unsigned iHit = 0; iHit < cdcHits.size(); ++iHit) {
611//std::cout << "now looping over cdchits... " << iHit << "/" << cdcHits.size() << std::endl;
612 if (tsHit->getID() == cdcHits[iHit]->getID()) {
613 // check, whether recotrack is already related to ts, skip in this case.
614 // this is necessary because sometimes two wires are related to the same ts // dont get it, should be unnecessary
615 if (related == false) related = true;
616 else continue;
617// std::cout << "ts " << tsHit->getID() << " : creating relation to recotrack " << ireco;
618 // std::cout << tsHit->getID() << " " << cdcHits[iHit]->getID() << " " << iHit << " matching id of priohit and current cdchit, creating relation... " << std::endl;
619 recoTrack->addRelationTo(tsHit);
620 tsHit->addRelationTo(recoTrack);
621 if (isl == 0) {
622 // this getrightleftinformation function returns 2 for a right pass, and 3 for a left pass
623 if (recoTrack->getRightLeftInformation(cdcHits[iHit]) == 3) lrflag = 0;
624 if (recoTrack->getRightLeftInformation(cdcHits[iHit]) == 2) lrflag = 1;
625 innerRecoLRTable[s.lutPattern()][lrflag] += 1;
626 innerRecoLRTable[s.lutPattern()][3] += tsHit->priorityTime();
627 innerRecoLRTable[s.lutPattern()][4] += adcSum;
628 B2DEBUG(100, its << " creating entry in recoLUT for pattern: " << s.lutPattern() << " : " << lrflag << " (recotrack " << ireco <<
629 "), hit: " << iHit);
630 } else {
631 if (recoTrack->getRightLeftInformation(cdcHits[iHit]) == 3) lrflag = 0;
632 if (recoTrack->getRightLeftInformation(cdcHits[iHit]) == 2) lrflag = 1;
633 outerRecoLRTable[s.lutPattern()][lrflag] += 1;
634 outerRecoLRTable[s.lutPattern()][3] += tsHit->priorityTime();
635 outerRecoLRTable[s.lutPattern()][4] += adcSum;
636 B2DEBUG(100, its << " creating entry in recoLUT for pattern: " << s.lutPattern() << " : " << lrflag << " (recotrack " << ireco <<
637 "), hit: " << iHit);
638 }
639//std::cout << " , lrflag: " << lrflag << ", 0=left, 1=right";
640 //break;
641 }
642 }
643 }
644 if (lrflag == 2) {
645 if (isl == 0) {
646 B2DEBUG(100, its << " creating bghit in recoLUT for pattern: " << s.lutPattern());
647 innerRecoLRTable[s.lutPattern()][2] += 1;
648 innerRecoLRTable[s.lutPattern()][3] += tsHit->priorityTime();
649 innerRecoLRTable[s.lutPattern()][4] += adcSum;
650 } else {
651 B2DEBUG(100, its << " creating bghit in recoLUT for pattern: " << s.lutPattern());
652 outerRecoLRTable[s.lutPattern()][2] += 1;
653 outerRecoLRTable[s.lutPattern()][3] += tsHit->priorityTime();
654 outerRecoLRTable[s.lutPattern()][4] += adcSum;
655
656 }
657 //std::cout << " , lrflag: " << lrflag << ", 0=left, 1=right, 2=bg";
658 }
659 //std::cout << std::endl;
660 }
661 }
662 }
663 }
664
665 //...Clear hit information after we're finished...
666 clear();
667}
668
669void
671{
672 // delete clocks
673 for (unsigned ic = 0; ic < clocks.size(); ++ic) {
674 delete clocks[ic];
675 }
676 clocks.clear();
677
678 // delete wire layers
679 for (unsigned isl = 0; isl < superLayers.size(); ++isl) {
680 for (unsigned il = 0; il < superLayers[isl].size(); ++il) {
681 for (unsigned iw = 0; iw < superLayers[isl][il]->nCells(); ++iw) {
682 delete &(superLayers[isl][il]->cell(iw));
683 }
684 delete superLayers[isl][il];
685 }
686 superLayers[isl].clear();
687 }
688 superLayers.clear();
689
690 // delete TS layers
691 for (unsigned isl = 0; isl < tsLayers.size(); ++isl) {
692 for (unsigned its = 0; its < tsLayers[isl]->nCells(); ++its) {
693 delete &(tsLayers[isl]->cell(its));
694 }
695 delete tsLayers[isl];
696 }
697 tsLayers.clear();
698
699 // save true left/right table
700 if (m_makeTrueLRTable) {
701 ofstream innerFile(m_innerTrueLRTableFilename);
702 ostream_iterator<unsigned> innerIterator(innerFile, " ");
703 for (unsigned pattern = 0; pattern < innerTrueLRTable.size(); ++pattern) {
704 copy(innerTrueLRTable[pattern].begin(), innerTrueLRTable[pattern].end(),
705 innerIterator);
706 innerFile << "\n";
707 }
708 ofstream outerFile(m_outerTrueLRTableFilename);
709 ostream_iterator<unsigned> outerIterator(outerFile, " ");
710 for (unsigned pattern = 0; pattern < outerTrueLRTable.size(); ++pattern) {
711 copy(outerTrueLRTable[pattern].begin(), outerTrueLRTable[pattern].end(),
712 outerIterator);
713 outerFile << "\n";
714 }
715 }
716
717 // save reco left/right table
718 if (m_makeRecoLRTable) {
719 ofstream innerFile(m_innerRecoLRTableFilename);
720 ostream_iterator<unsigned> innerIterator(innerFile, " ");
721 for (unsigned pattern = 0; pattern < innerRecoLRTable.size(); ++pattern) {
722 copy(innerRecoLRTable[pattern].begin(), innerRecoLRTable[pattern].end(),
723 innerIterator);
724 innerFile << "\n";
725 }
726 ofstream outerFile(m_outerRecoLRTableFilename);
727 ostream_iterator<unsigned> outerIterator(outerFile, " ");
728 for (unsigned pattern = 0; pattern < outerRecoLRTable.size(); ++pattern) {
729 copy(outerRecoLRTable[pattern].begin(), outerRecoLRTable[pattern].end(),
730 outerIterator);
731 outerFile << "\n";
732 }
733 }
734}
735
736void
738{
740 for (unsigned isl = 0; isl < superLayers.size(); ++isl) {
741 if (isl < cdc.getOffsetOfFirstSuperLayer()) {
742 continue;
743 }
744 for (unsigned il = 0; il < superLayers[isl].size(); ++il) {
745 for (unsigned iw = 0; iw < superLayers[isl][il]->nCells(); ++iw) {
746 TRGCDCWire& w = (TRGCDCWire&) superLayers[isl][il]->cell(iw);
747 delete w.hit();
748 w.clear();
749 }
750 }
751 for (unsigned its = 0; its < tsLayers[isl]->nCells(); ++its) {
752 TRGCDCSegment& s = (TRGCDCSegment&) tsLayers[isl]->cell(its);
753 s.clear();
754 }
755 }
756
757}
Class containing the result of the unpacker in raw data and the result of the digitizer in simulation...
Definition CDCHit.h:40
unsigned short getADCCount() const
Getter for integrated charge.
Definition CDCHit.h:230
Example Detector.
Definition CDCSimHit.h:21
int getLeftRightPassage() const
The method to get new left/right info. for tracking.
Definition CDCSimHit.h:237
Combination of several CDCHits to a track segment hit for the trigger.
short priorityTime() const
get hit time of priority cell in trigger clocks
unsigned short getID() const
get the encoded wire number of the priority wire.
std::string m_outerRecoLRTableFilename
filename for the table which contains the number of reconstructed left/right for each pattern in the ...
std::vector< TRGCDCLayer * > tsLayers
structure to hold pointers to all track segment shapes
bool m_relateAllHits
relate all cdchtis to ts, not just opriority wire
bool m_clockSimulation
switch for simulating clock by clock
std::string m_CDCHitCollectionName
name of the input StoreArray
std::string m_outerTrueLRTableFilename
filename for the table which contains the number of true left/right for each pattern in the outer sup...
CDCTriggerTSFModule()
Constructor, for setting module description and parameters.
bool m_crosstalk_tdcfilter
TDC based crosstalk filtering logic on CDCFE.
virtual void initialize() override
Initialize the module and register DataStore arrays.
std::string m_innerRecoLRTableFilename
filename for the table which contains the number of reconstructed left/right for each pattern in the ...
bool m_adcflag
remove hits with lower ADC than cut threshold.
virtual void event() override
Run the TSF for an event.
bool deadch_map[c_nSuperLayers][MAX_N_LAYERS][c_maxNDriftCells]
bad channel mapping
int m_adcflag_high
Assign ADC based flag for full hit tracker.
OptionalDBObjPtr< CDCTriggerDeadch > m_db_deadchannel
dbobject to store deadchannel
StoreArray< CDCTriggerSegmentHit > m_segmentHits
list of output track segment hits
std::vector< std::vector< unsigned > > outerRecoLRTable
list of (# true right, # true left, # true background) for the outer super layers
bool m_saveadc
flag for saving adc information or not.
virtual void terminate() override
Clean up pointers.
std::vector< std::vector< unsigned > > outerTrueLRTable
list of (# true right, # true left, # true background) for the outer super layers
DBObjPtr< CDCTriggerTSFConfig > m_cdctrgtsf_DB
run dependent parameter database of TSF
std::string m_innerTSLUTFilename
The filename of LUT for the inner-most track segments.
virtual void beginRun() override
Register run-dependent DataStore arrays.
std::vector< std::vector< unsigned > > innerRecoLRTable
list of (# reconstructed right, # reconstructed left, # unrelated background) for the inner-most supe...
std::vector< std::vector< unsigned > > innerTrueLRTable
list of (# true right, # true left, # true background) for the inner-most super layer
int m_adcflag_low
Assign ADC based flag for full hit tracker.
int m_adccut
threshold for the adc cut.
bool m_makeTrueLRTable
switch for saving the number of true left/right for each pattern
std::string m_TSHitCollectionName
name of the output StoreArray
static const int MAX_N_LAYERS
number of layers in Super layer
StoreArray< CDCHit > m_cdcHits
list of input CDC hits
StoreArray< RecoTrack > m_recoTracks
list of recotracks, needed for recolrtable
void clear()
remove hit information from last event
std::string m_outerTSLUTFilename
The filename of LUT for outer track segments.
std::vector< TRGClock * > clocks
list of clocks used in the TSF
std::string m_innerTrueLRTableFilename
filename for the table which contains the number of true left/right for each pattern in the inner-mos...
bool m_useDB
switch to use database to load run dependent parameter
std::vector< std::vector< TRGCDCLayer * > > superLayers
structure to hold pointers to all wires in the CDC
bool m_deadchflag
mask Dead channel or not.
The Class for CDC Geometry Parameters.
static CDCGeometryPar & Instance(const CDCGeometry *=nullptr)
Static method to get a reference to the CDCGeometryPar instance.
A Class to store the Monte Carlo particle information.
Definition MCParticle.h:32
void setDescription(const std::string &description)
Sets the description of the module.
Definition Module.cc:214
void setPropertyFlags(unsigned int propertyFlags)
Sets the flags for the module properties.
Definition Module.cc:208
Module()
Constructor.
Definition Module.cc:30
@ c_ParallelProcessingCertified
This module can be run in parallel processing mode safely (All I/O must be done through the data stor...
Definition Module.h:80
This is the Reconstruction Event-Data Model Track.
Definition RecoTrack.h:79
std::vector< Belle2::RecoTrack::UsedCDCHit * > getCDCHitList() const
Return an unsorted list of cdc hits.
Definition RecoTrack.h:455
RightLeftInformation getRightLeftInformation(const HitType *hit) const
Return the right left information of a given hit (every type) or throws an exception of the hit is no...
Definition RecoTrack.h:339
Class for type safe access to objects that are referred to in relations.
size_t size() const
Get number of relations.
float weight(int index) const
Get weight with index.
void addRelationTo(const RelationsInterface< BASE > *object, float weight=1.0, const std::string &namedRelation="") const
Add a relation from this object to another object (with caching).
RelationVector< FROM > getRelationsFrom(const std::string &name="", const std::string &namedRelation="") const
Get the relations that point from another store array to this object.
FROM * getRelatedFrom(const std::string &name="", const std::string &namedRelation="") const
Get the object from which this object has a relation.
virtual unsigned short getBackgroundTag() const
Get background tag.
Definition SimHitBase.h:46
bool isRequired(const std::string &name="")
Ensure this array/object has been registered previously.
Accessor to arrays stored in the data store.
Definition StoreArray.h:113
bool registerRelationTo(const StoreArray< TO > &toArray, DataStore::EDurability durability=DataStore::c_Event, DataStore::EStoreFlags storeFlags=DataStore::c_WriteOut, const std::string &namedRelation="") const
Register a relation to the given StoreArray.
Definition StoreArray.h:140
Type-safe access to single objects in the data store.
Definition StoreObjPtr.h:96
A class to represent a wire in CDC.
Definition Cell.h:40
A class to represent a cell layer.
Definition Layer.h:33
A class to represent a wire in CDC.
Definition Segment.h:39
A class to represent a wire hit in CDC.
Definition WireHit.h:33
A class to represent a wire in CDC.
Definition Wire.h:56
A class to represent a digitized signal. Unit is nano second.
Definition Clock.h:38
A class to represent a digitized signal. Unit is nano second.
Definition Signal.h:23
A class to represent a signal timing in the trigger system.
Definition Time.h:25
Class to identify a wire inside the CDC.
Definition WireID.h:34
void addParam(const std::string &name, T &paramVariable, const std::string &description, const T &defaultValue)
Adds a new parameter to the module.
Definition Module.h:559
#define REG_MODULE(moduleName)
Register the given module (without 'Module' suffix) with the framework.
Definition Module.h:649
void addSignal(const TRGSignal &newSignal)
set signal |= newSignal
Definition Wire.h:169
const TRGClock & clock(void) const
returns clock.
Definition Signal.h:331
unsigned localLayerId(void) const
returns local layer id in a super layer.
Definition Cell.h:228
TRGTime & reverse(void)
reverse edge.
Definition Time.h:141
unsigned superLayerId(void) const
returns super layer id.
Definition Cell.h:221
const TRGSignal & signal(void) const override
returns an input to the trigger. This is sync'ed to 1GHz clock.
Definition Wire.h:242
TRGTime & shift(int unit)
delays by clock unit.
Definition Time.h:163
const TRGCDCWireHit * hit(void) const
returns a pointer to a TRGCDCWireHit.
Definition Wire.h:153
void initialize(void)
initialize variables.
Definition Segment.cc:65
std::string name(void) const override
returns name.
Definition Wire.cc:385
void clear(void) override
clears information.
Definition Wire.cc:370
unsigned iCDCHit(void) const
returns an index to CDCHit.
Definition CellHit.h:360
const TRGCDCLayer & layer(void) const
returns a pointer to a layer.
Definition Cell.h:235
bool active(void) const
returns true if there is a signal.
Definition Signal.h:277
unsigned nCells(void) const
returns # of cells.
Definition Layer.h:194
unsigned localId(void) const
returns local id in a layer.
Definition Cell.h:207
void addSignal_adc(const TRGSignal &newSignal)
set signal |= newSignal
Definition Wire.h:176
Abstract base class for different kinds of events.
STL namespace.