Belle II Software development
Merger Struct Reference

unpacker for the merger reader (TSF which reads the merger output) More...

Inheritance diagram for Merger:
SubTrigger

Public Member Functions

 Merger (StoreArray< MergerBits > *inArrayPtr, const std::string &inName, unsigned inEventWidth, unsigned inOffset, int inHeaderSize, const std::vector< int > &inNodeID, const std::vector< int > &inNodeID_pcie40, unsigned inNInnerMergers, int &inDelay, int &inCnttrg, int inDebugLevel)
 Constructor.
 
void reserve (int subDetectorId, std::array< int, nFinesse > nWords, bool pciedata) override
 reserve enough number of clocks (entries) in the Bitstream StoreArray
 
void unpack (int subDetectorId, std::array< int *, 48 > data32tab, std::array< int, 48 > nWords, bool pciedata) override
 Unpack function.
 
virtual void unpack (int, std::array< int *, nFinesse >, std::array< int, nFinesse >, bool)
 Unpack the Belle2Link data and fill the Bitstream.
 
virtual int getHeaders (int subDetectorId, std::array< int *, 48 > data32tab, std::array< int, 48 > nWords, bool pciedata)
 Get the Belle2Link header information.
 

Public Attributes

StoreArray< MergerBits > * arrayPtr
 pointer to the merger output Bitstream
 
unsigned nInnerMergers
 number of merger units in the inner super layer than this one
 
std::string name
 Name of the UT3.
 
unsigned eventWidth
 Size of an event in the Belle2Link data in 32-bit words.
 
unsigned offset
 The starting point of the data in an event.
 
int headerSize
 Size of the B2L header in words.
 
int iNode
 COPPER id of the board.
 
int iFinesse
 FINESSE (HSLB) id) of the board.
 
int iNode_pcie40
 PCIe40 id of the board.
 
int iFinesse_pcie40
 PCIe40 ch id of the board.
 
std::string firmwareType
 type of the FPGA firmware
 
std::string firmwareVersion
 version of the FPGA firmware
 
int & delay
 Reference to the variable of its Belle2Link delay.
 
int & cnttrg
 counter of trgger signal, total 32 bits, the 20 LSBs recorded in the event header
 
int debugLevel
 debug level in the steering file
 

Detailed Description

unpacker for the merger reader (TSF which reads the merger output)

Definition at line 54 of file CDCTriggerUnpackerModule.cc.

Constructor & Destructor Documentation

◆ Merger()

Merger ( StoreArray< MergerBits > *  inArrayPtr,
const std::string &  inName,
unsigned  inEventWidth,
unsigned  inOffset,
int  inHeaderSize,
const std::vector< int > &  inNodeID,
const std::vector< int > &  inNodeID_pcie40,
unsigned  inNInnerMergers,
int &  inDelay,
int &  inCnttrg,
int  inDebugLevel 
)
inline

Constructor.

Definition at line 56 of file CDCTriggerUnpackerModule.cc.

61 :
62 SubTrigger(inName, inEventWidth, inOffset,
63 inHeaderSize, inNodeID, inNodeID_pcie40, inDelay, inCnttrg, inDebugLevel),
64 arrayPtr(inArrayPtr),
65 nInnerMergers(inNInnerMergers) {};
StoreArray< MergerBits > * arrayPtr
pointer to the merger output Bitstream
unsigned nInnerMergers
number of merger units in the inner super layer than this one
enum class SubTriggerType : unsigned char {Merger, TSF, T2D, T3D, Neuro, ETF};

Member Function Documentation

◆ getHeaders()

virtual int getHeaders ( int  subDetectorId,
std::array< int *, 48 >  data32tab,
std::array< int, 48 >  nWords,
bool  pciedata 
)
inlinevirtualinherited

Get the Belle2Link header information.

Parameters
subDetectorIdCOPPER id of the current data
data32tablist of pointers to the Belle2Link data buffers
nWordsNumber of words of each FINESSE in the COPPER
pciedataSwitch between PCIe 40 and COPPER
Returns
1 if there are data other than the header

Definition at line 128 of file CDCTriggerUnpackerModule.h.

132 {
133
134 int iNode_i = 0;
135 int iFinesse_i = 0;
136 if (pciedata) {
137 iNode_i = iNode_pcie40;
138 iFinesse_i = iFinesse_pcie40;
139 } else {
140 iNode_i = iNode;
141 iFinesse_i = iFinesse;
142 }
143
144 if (subDetectorId != iNode_i) {
145 return 0;
146 }
147 // int nWordsize = 3075; // temporary solution to hard coded the correct event size (for 2D only?)
148 // empty data buffer
149 if (nWords[iFinesse_i] < headerSize) {
150 B2WARNING("The module " << name << " does not have enough data (" <<
151 nWords[iFinesse_i] << "). Nothing will be unpacked.");
152 return 0;
153 } else if (nWords[iFinesse_i] == headerSize) {
154 B2DEBUG(20, "The module " << name <<
155 " contains only the header. Nothing will be unpacked.");
156 return 0;
157 }
158
159 // need one more check, give a warning if the event has wrong data size
160
161 // event data block header:
162 // 0xdddd --> correct event data (for 2D only?)
163 // 0xbbbb --> dummy buffer supposed to be used for only suppressed events.
164 if (nWords[iFinesse_i] > headerSize) {
165 //dataHeader = CDCTriggerUnpacker::rawIntToAscii(data32tab.at(iFinesse)[headerSize]&0xFFFF0000 >> 16);
166 //bool dataHeader = ( (data32tab.at(iFinesse)[headerSize]&0xffff0000) == 0xdddd0000);
167 long dataHeader = (data32tab.at(iFinesse_i)[headerSize] & 0xffff0000);
168 if (dataHeader != 0xdddd0000) {
169 B2DEBUG(30, "The module " << name << " has an event data header " << std::hex << std::setfill('0') << std::setw(4) <<
170 (dataHeader >> 16) <<
171 " in this event. It will be ignore.");
172 return 0;
173 }
174 B2DEBUG(50, "subdet and head size " << std::setfill('0') << std::hex << std::setw(8) << iNode_i << ", " << std::dec << std::setw(
175 0) << nWords[iFinesse_i] <<
176 " : " << std::hex << std::setw(8) << data32tab.at(iFinesse_i)[0] << " " << data32tab.at(iFinesse_i)[1] << " " << data32tab.at(
177 iFinesse_i)[2] <<
178 " " << data32tab.at(iFinesse_i)[3] << " dataheader = " << dataHeader);
179 }
180
181 /* get event header information
182 * Ideally, these parameters should not change in the same run,
183 * so it is more efficiency to do it in beginRun().
184 * However, since they are present in all events,
185 * let's check if they really remain unchanged.
186 */
187 if (headerSize >= 2) {
188 // supposedly these two Words will stay for all the versions
189 firmwareType = CDCTriggerUnpacker::rawIntToAscii(data32tab.at(iFinesse_i)[0]);
190 firmwareVersion = CDCTriggerUnpacker::rawIntToString(data32tab.at(iFinesse_i)[1]);
191 //int cnttrg = 0; // temporary solution, this should be one as a reference for comparison
192 int l1_revoclk = -1;
193
194 if (headerSize >= 3) {
195 std::bitset<wordWidth> thirdWord(data32tab.at(iFinesse_i)[2]);
196 l1_revoclk = CDCTriggerUnpacker::subset<32, 0, 11>(thirdWord).to_ulong();
197
198 if (firmwareType == "2D ") { // temporary solcuion, the following version number check is valid only for 2D
199
200 if (firmwareVersion > "19041700") { // started since 19041705
201 // the third word is cnttrg and L1_revoclk
202 int newCnttrg = CDCTriggerUnpacker::subset<32, 12, 31>(thirdWord).to_ulong();
203 cnttrg = newCnttrg;
204 } else if (firmwareVersion > "17121900") { // upto that version, headerSize == 2?
205 // the third word is b2l delay and L1_revoclk
206 int newDelay = CDCTriggerUnpacker::subset<32, 12, 20>
207 (thirdWord).to_ulong(); // or should be <32,12,19>? bit 31-20 are for prescale?
208 if (delay > 0 && delay != newDelay) {
209 B2WARNING(" the Belle2Link delay for " << name <<
210 "has changed from " << delay << " to " << newDelay << "!");
211 }
212 delay = newDelay;
213 }
214 }
215 }
216
217 B2DEBUG(20, name << ": " << firmwareType << ", version " <<
218 firmwareVersion << ", node " << std::hex << iNode_i <<
219 ", finesse " << iFinesse_i << ", delay: " << delay <<
220 ", cnttrg: " << cnttrg << std::dec << " == " << cnttrg << ", L1_revoclk " << l1_revoclk);
221
222
223 }
224 return 1;
225 };
int iNode_pcie40
PCIe40 id of the board.
int headerSize
Size of the B2L header in words.
std::string firmwareVersion
version of the FPGA firmware
std::string firmwareType
type of the FPGA firmware
int iFinesse
FINESSE (HSLB) id) of the board.
int & delay
Reference to the variable of its Belle2Link delay.
int iFinesse_pcie40
PCIe40 ch id of the board.
int & cnttrg
counter of trgger signal, total 32 bits, the 20 LSBs recorded in the event header
std::string name
Name of the UT3.
int iNode
COPPER id of the board.

◆ reserve()

void reserve ( int  subDetectorId,
std::array< int, nFinesse nWords,
bool  pciedata 
)
inlineoverridevirtual

reserve enough number of clocks (entries) in the Bitstream StoreArray

Reimplemented from SubTrigger.

Definition at line 72 of file CDCTriggerUnpackerModule.cc.

73 {
74 int iNode_i = 0;
75 int iFinesse_i = 0;
76 if (pciedata) {
77 iNode_i = iNode_pcie40;
78 iFinesse_i = iFinesse_pcie40;
79 } else {
80 iNode_i = iNode;
81 iFinesse_i = iFinesse;
82 }
83
84 if (subDetectorId != iNode_i) {
85 return;
86 }
87 if (nWords[iFinesse_i] < headerSize) {
88 return;
89 }
90 size_t nClocks = (nWords[iFinesse_i] - headerSize) / eventWidth;
91 size_t entries = arrayPtr->getEntries();
92 if (entries == 0) {
93 for (unsigned i = 0; i < nClocks; ++i) {
94 arrayPtr->appendNew();
95 }
96 B2DEBUG(20, name << ": " << nClocks << " clocks");
97 } else if (entries != nClocks) {
98 B2DEBUG(20, "Number of clocks in " << name << " conflicts with others!");
99 }
100 };
unsigned eventWidth
Size of an event in the Belle2Link data in 32-bit words.

◆ unpack() [1/2]

void unpack ( int  subDetectorId,
std::array< int *, 48 >  data32tab,
std::array< int, 48 >  nWords,
bool  pciedata 
)
inlineoverride

Unpack function.

Definition at line 103 of file CDCTriggerUnpackerModule.cc.

107 {
108 int iNode_i = 0;
109 int iFinesse_i = 0;
110 if (pciedata) {
111 iNode_i = iNode_pcie40;
112 iFinesse_i = iFinesse_pcie40;
113 } else {
114 iNode_i = iNode;
115 iFinesse_i = iFinesse;
116 }
117
118 if (subDetectorId != iNode_i) {
119 return;
120 }
121 if (nWords[iFinesse_i] < headerSize) {
122 B2DEBUG(20, "The module " << name << " does not have enough data (" <<
123 nWords[iFinesse_i] << "). Nothing will be unpacked.");
124 // TODO: need to clear the output bitstream because we return early here
125 return;
126 }
127 // make bitstream
128 // loop over all clocks
129 for (int i = headerSize; i < nWords[iFinesse_i]; i += eventWidth) {
130 int iclock = (i - headerSize) / eventWidth;
131 auto mergerClock = (*arrayPtr)[iclock];
132 B2DEBUG(100, "clock " << iclock);
133 // loop over all mergers
134 for (unsigned j = offset; j < eventWidth; ++j) {
135 int iMerger = (eventWidth - j - 1) / 8 + nInnerMergers;
136 int pos = (eventWidth - j - 1) % 8;
137 dataWord word(data32tab[iFinesse_i][i + j]);
138 for (int k = 0; k < wordWidth; ++k) {
139 mergerClock->m_signal[iMerger].set(pos * wordWidth + k, word[k]);
140 }
141 }
142 }
143 if (debugLevel >= 300) {
144 printBuffer(data32tab[iFinesse_i] + headerSize, eventWidth);
145 B2DEBUG(20, "");
146 printBuffer(data32tab[iFinesse_i] + headerSize + eventWidth, eventWidth);
147 }
148 for (int i = 0; i < std::accumulate(nMergers.begin(), nMergers.end(), 0); ++i) {
149 B2DEBUG(99, (*arrayPtr)[0]->m_signal[i].to_string());
150 }
151 }
static constexpr int wordWidth
width of a single word in the raw int buffer
unsigned offset
The starting point of the data in an event.
int debugLevel
debug level in the steering file

◆ unpack() [2/2]

virtual void unpack ( int  ,
std::array< int *, nFinesse ,
std::array< int, nFinesse ,
bool   
)
inlinevirtualinherited

Unpack the Belle2Link data and fill the Bitstream.

Reimplemented in Neuro.

Definition at line 110 of file CDCTriggerUnpackerModule.h.

113 {};

Member Data Documentation

◆ arrayPtr

StoreArray<MergerBits>* arrayPtr

pointer to the merger output Bitstream

Definition at line 68 of file CDCTriggerUnpackerModule.cc.

◆ cnttrg

int& cnttrg
inherited

counter of trgger signal, total 32 bits, the 20 LSBs recorded in the event header

Definition at line 96 of file CDCTriggerUnpackerModule.h.

◆ debugLevel

int debugLevel
inherited

debug level in the steering file

Definition at line 99 of file CDCTriggerUnpackerModule.h.

◆ delay

int& delay
inherited

Reference to the variable of its Belle2Link delay.

Definition at line 94 of file CDCTriggerUnpackerModule.h.

◆ eventWidth

unsigned eventWidth
inherited

Size of an event in the Belle2Link data in 32-bit words.

Definition at line 74 of file CDCTriggerUnpackerModule.h.

◆ firmwareType

std::string firmwareType
inherited

type of the FPGA firmware

Definition at line 90 of file CDCTriggerUnpackerModule.h.

◆ firmwareVersion

std::string firmwareVersion
inherited

version of the FPGA firmware

Definition at line 92 of file CDCTriggerUnpackerModule.h.

◆ headerSize

int headerSize
inherited

Size of the B2L header in words.

Definition at line 78 of file CDCTriggerUnpackerModule.h.

◆ iFinesse

int iFinesse
inherited

FINESSE (HSLB) id) of the board.

Definition at line 82 of file CDCTriggerUnpackerModule.h.

◆ iFinesse_pcie40

int iFinesse_pcie40
inherited

PCIe40 ch id of the board.

Definition at line 86 of file CDCTriggerUnpackerModule.h.

◆ iNode

int iNode
inherited

COPPER id of the board.

Definition at line 80 of file CDCTriggerUnpackerModule.h.

◆ iNode_pcie40

int iNode_pcie40
inherited

PCIe40 id of the board.

Definition at line 84 of file CDCTriggerUnpackerModule.h.

◆ name

std::string name
inherited

Name of the UT3.

Definition at line 72 of file CDCTriggerUnpackerModule.h.

◆ nInnerMergers

unsigned nInnerMergers

number of merger units in the inner super layer than this one

Definition at line 70 of file CDCTriggerUnpackerModule.cc.

◆ offset

unsigned offset
inherited

The starting point of the data in an event.

Definition at line 76 of file CDCTriggerUnpackerModule.h.


The documentation for this struct was generated from the following file: