13#ifndef TRGCDCJSignal_FLAG_
14#define TRGCDCJSignal_FLAG_
22#ifdef TRGCDC_SHORT_NAMES
23#define JSignal TRGCDCJSignal
32 class TRGCDCJSignalData;
48 TRGCDCJSignal(
signed long long const& intValue,
double const& toReal,
signed long long const& minInt,
49 signed long long const& maxInt,
double const& actual,
double const& minActual,
double const& maxActual,
int const& finishClock,
85 TRGCDCJSignal const& reference, std::vector<std::vector<TRGCDCJSignal> > data,
int targetClock);
88 TRGCDCJSignal const& reference,
const std::vector<std::vector<TRGCDCJSignal> >& data);
95 static void ifElse(std::vector<std::pair<
TRGCDCJSignal, std::vector<std::pair<TRGCDCJSignal*, TRGCDCJSignal> > > >& data,
98 static void ifElse(std::vector<std::pair<
TRGCDCJSignal, std::vector<std::pair<TRGCDCJSignal*, TRGCDCJSignal> > > >& data);
100 TRGCDCJSignal const limit(
signed long long minInt,
signed long long maxInt,
double minActual,
double maxActual)
const;
116 signed long long const& maxInt,
double const& actual,
double const& minActual,
double const& maxActual,
int const& finishClock);
121 signed long long const& maxInt,
double const& actual,
double const& minActual,
double const& maxActual,
int const& finishClock);
135 void setName(
const std::string& name);
137 void setInt(
signed long long value);
163 signed long long getInt()
const;
185 std::vector<std::pair<std::string, std::vector<int> > >
const getArgumentSignals()
const;
191 int calType(
double minValue)
const;
195 int calBitwidth(
int type,
signed long long minInt,
signed long long maxInt);
238 std::string& targtVhdlCode);
241 std::string& targetVhdlCode);
244 std::vector<std::pair<std::string, std::vector<int> > >
const& fromVhdlSignals,
int const& finishClock,
245 std::map<std::string, std::vector<int> >& buffers);
250 std::vector<std::vector<TRGCDCJSignal> >
const& data);
257 void checkInt(
const std::string& name)
const;
263 static void valuesToMapSignals(std::vector<std::tuple<std::string, double, int, double, double, int> >
const& inValues,
268 static void mapSignalsToValues(std::map<std::string, Belle2::TRGCDCJSignal>
const& inMap,
269 std::vector<std::pair<std::string, int> >
const& inChoose,
270 std::vector<std::tuple<std::string, double, int, double, double, int> >& outValues);
A class to hold common data for JSignals.
A class to use Signals for TRGCDC 3D tracker.
std::vector< std::pair< std::string, std::vector< int > > > m_argumentSignals
vector<int> is {type, bitwidth, clock} Holds the arguments that made the signal.
~TRGCDCJSignal()
Destructor.
int m_finishClock
Holds the clock tick when the signal is valid.
double m_toReal
The toReal value.
double m_minActual
The minimum float value.
static TRGCDCJSignal const signedToSlv(TRGCDCJSignal const &in)
Change signed to slv.
bool m_debug
The debug flag.
signed long long m_minInt
The minimum integer value.
double m_maxActual
The maximum float value.
int m_bitsize
+1: unsigned.
int m_type
Type of signal.
signed long long m_int
integer value of signal.
static TRGCDCJSignal const unsignedToSlv(TRGCDCJSignal const &in)
Change unsigned to slv.
TRGCDCJSignalData * m_commonData
The common JSignalData.
signed long long m_maxInt
The maximum integer value.
std::string m_name
Memebers.
std::string m_vhdlCode
Holds the vhdl code.
double m_actual
The float value.
std::vector< bool > m_slv
storage for std_logic_vector. (Will be deprecated.)
signed long long calMaxInteger() const
Calculate max value for a binary number.
int calType() const
Calculated what type the signal is.
double getActual() const
Get float value of signal.
TRGCDCJSignal const invOffset(TRGCDCJSignal const &valueMin) const
Outputs a signal that is not offset.
void printVhdl(const std::string &vhdlCode) const
Prints vhdl code.
std::string getName() const
Get name of signal.
std::string getVhdlOutputFile() const
Gets the vhdl output file name.
void setCommonData(TRGCDCJSignalData *)
Sets JSignalData to signal.
void setBitsize(int bitsize)
Sets bitwidth of signal.
TRGCDCJSignal const operator-() const
Unary operator.
static void vhdlCode(TRGCDCJSignal const &first, const std::string &operation, TRGCDCJSignal const &second, TRGCDCJSignal const &result, std::string &targtVhdlCode)
Writes vhdl code using two signals.
static void valuesToMapSignals(std::vector< std::tuple< std::string, double, int, double, double, int > > const &inValues, Belle2::TRGCDCJSignalData *inCommonData, std::map< std::string, Belle2::TRGCDCJSignal > &outMap)
Values => [name, value, bitwidth, min, max, clock] Changes values to signals.
TRGCDCJSignal const operator+(TRGCDCJSignal const &rhs) const
Arithmetic add operator.
TRGCDCJSignal & assignTo(TRGCDCJSignal const &rhs, int targetClock, std::string &finalCode)
Assign operator with setting target clock with outputing final code.
TRGCDCJSignal const offset(TRGCDCJSignal const &valueMin) const
Outputs an offset signal which is an unsigned signal.
bool orderLargestBitsize(TRGCDCJSignal &large, TRGCDCJSignal &small) const
Orders the TRGCDCJSignals by bitsize. Next priority is unsigned, signed, minus unsigned....
static bool isSameSignal(TRGCDCJSignal const &lhs, TRGCDCJSignal const &rhs)
Checks if signal is same signal.
void setActual(double value)
Sets float value of signal.
static std::string replaceWithSignalNames(std::string const &fromVhdlCode, std::vector< std::pair< std::string, std::vector< int > > > const &fromVhdlSignals, int const &finishClock, std::map< std::string, std::vector< int > > &buffers)
Writes final vhdl code.
TRGCDCJSignal const shift(int nBits, int operate=1) const
Shift signal. Shift direction is right. operate=0 to change m_toReal(unit).
TRGCDCJSignalData * getCommonData() const
Get the sharged JSignalData.
double getMaxActual() const
Get maximum float value of signal.
static void choose(TRGCDCJSignal &target, TRGCDCJSignal const &targetMin, TRGCDCJSignal const &targetMax, TRGCDCJSignal const &reference, std::vector< std::vector< TRGCDCJSignal > > data, int targetClock)
Case method.
static TRGCDCJSignal const toSlv(TRGCDCJSignal const &in, int test)
Change signal to std_logic_vector using vector<bool>. (Will be deprecated.)
void initArgumentSignals()
Initializes the argument signals for the signal.
void setVhdlOutputFile(const std::string &filename)
Sets ouptut VHDL filename.
std::string getVhdlCode() const
Gets the vhdl code for the signal.
void setInt(signed long long value)
Sets integer value of signal.
int calBitwidth() const
Calculates the bit width.
bool getPrintVhdl() const
Gets the print vhdl flag from common JSignalData class.
static void ifElse(std::vector< std::pair< TRGCDCJSignal, std::vector< std::pair< TRGCDCJSignal *, TRGCDCJSignal > > > > &data, int targetClock)
If else implementation with target clock.
std::vector< std::pair< std::string, std::vector< int > > > const getArgumentSignals() const
Gets the signal names and values that made this signal.
static std::string assignVhdlCode(TRGCDCJSignal const &target, TRGCDCJSignal const &from)
Writes the assign vhdl code.
TRGCDCJSignal const resize(int bitwidth) const
Resizes signal.
double getRealMinInt() const
Get converted float value of minimum integer.
static void combineArguments(TRGCDCJSignal const &first, TRGCDCJSignal const &second, TRGCDCJSignal &result)
Combines arguments of signals.
static std::string chooseVhdlCode(TRGCDCJSignal const &target, TRGCDCJSignal const &reference, std::vector< std::vector< TRGCDCJSignal > > const &data)
Writes the choose vhdl code.
static TRGCDCJSignal const absolute(TRGCDCJSignal const &first)
Absolute TRGCDCJSignal. Removes 1 bit if signed or minus unsigned.
int getFinishClock() const
Gets clock tick where signal is make.
static signed long long calInt(double value, TRGCDCJSignal const &mother)
Calculates integer value with unit of a TRGCDCJSignal.
void setFinishClock(int finishClock)
Sets finish clock of signal.
signed long long getInt() const
Get integer value of signal.
double getToReal() const
Get toReal value of signal.
void matchUnit(TRGCDCJSignal &first, TRGCDCJSignal &second) const
Utilities.
void setDebug(bool debug)
Sets debug flag for signal.
TRGCDCJSignal const limit(signed long long minInt, signed long long maxInt, double minActual, double maxActual) const
Limits min and max values using specific integers. Use only for ifElse. Doesn't check overflow,...
static void calVhdlTypeBitwidth(TRGCDCJSignal const &first, const std::string &operation, TRGCDCJSignal const &second, int &type, int &bitwidth)
Calculates vhdl bitwidth and type for operation.
void setName(const std::string &name)
Setters, Getters Sets name of signal.
double getRealMaxInt() const
Get converted float value of maximum integer.
void checkInt(const std::string &name) const
Checks underflow or overflow for TRGCDCJSignal.
void swap(TRGCDCJSignal &first, TRGCDCJSignal &second) const
Swaps the TRGCDCJSignals.
TRGCDCJSignal const operator*(TRGCDCJSignal const &rhs) const
Arithmetic multiply operator.
double getBitsize() const
Get bitwidth of signal.
TRGCDCJSignal & operator<=(TRGCDCJSignal const &rhs)
Assign operator.
signed long long calMinInteger() const
Calculate min value for a binary number.
void initVhdlCode()
Initializes the vhdl code.
void setPrintVhdl(bool printVhdl)
Sets print flag for signal.
int getType() const
Get type of signal.
static std::string ifElseVhdlCode(std::vector< std::pair< TRGCDCJSignal, std::vector< std::pair< TRGCDCJSignal *, TRGCDCJSignal > > > > const &data)
Writes the ifElse vhdl code.
void toUnsignedVhdlCode()
Changes signal type to unsigned type in VHDL.
double getMinActual() const
Get minimum float value of signal.
signed long long getMaxInt() const
Get maximum integer value of signal.
int calFinishClock() const
Claculates the clock tick where the signal is valid.
static TRGCDCJSignal const slvToUnsigned(TRGCDCJSignal const &in, double const &toReal, signed long long const &minInt, signed long long const &maxInt, double const &actual, double const &minActual, double const &maxActual, int const &finishClock)
Change slv to unsigned with target clock.
void dump() const
Methods.
double getRealInt() const
Get converted float value of integer.
TRGCDCJSignal()
Constructor.
signed long long getMinInt() const
Get minimum integer value of signal.
void setToReal(double value)
Sets toReal factor of signal.
static void mapSignalsToValues(std::map< std::string, Belle2::TRGCDCJSignal >const &inMap, std::vector< std::pair< std::string, int > > const &inChoose, std::vector< std::tuple< std::string, double, int, double, double, int > > &outValues)
Choose => [signalName, FpgaEffects(=1)/NoFpgaEffects(=0)] Values => [name, value, bitwidth,...
void setType(int type)
Sets type of signal.
void toSignedVhdlCode()
Changes signal type to signed type in VHDL.
static TRGCDCJSignal comp(TRGCDCJSignal const &lhs, const std::string &operate, TRGCDCJSignal const &rhs)
Compare two signals.
static TRGCDCJSignal const slvToSigned(TRGCDCJSignal const &in, double const &toReal, signed long long const &minInt, signed long long const &maxInt, double const &actual, double const &minActual, double const &maxActual, int const &finishClock)
Change slv to signed with target clock.
Abstract base class for different kinds of events.