Belle II Software  release-08-01-10
CDCTriggerTSFModule.cc
1 /**************************************************************************
2  * basf2 (Belle II Analysis Software Framework) *
3  * Author: The Belle II Collaboration *
4  * *
5  * See git log for contributors and copyright holders. *
6  * This file is licensed under LGPL-3.0, see LICENSE.md. *
7  **************************************************************************/
8 #include "trg/cdc/modules/trgcdc/CDCTriggerTSFModule.h"
9 
10 #include <cdc/dataobjects/CDCSimHit.h>
11 #include <cdc/dataobjects/CDCRawHit.h>
12 #include <cdc/dataobjects/WireID.h>
13 #include <mdst/dataobjects/MCParticle.h>
14 
15 #include <cdc/geometry/CDCGeometryPar.h>
16 #include <trg/cdc/Layer.h>
17 #include <trg/cdc/Wire.h>
18 #include <trg/cdc/WireHit.h>
19 #include <trg/cdc/Segment.h>
20 #include <tracking/dataobjects/RecoTrack.h>
21 
22 #include <fstream>
23 
24 #define P3D HepGeom::Point3D<double>
25 
26 using namespace std;
27 using namespace Belle2;
28 
29 //this line registers the module with the framework and actually makes it available
30 //in steering files or the the module list (basf2 -m).
31 REG_MODULE(CDCTriggerTSF);
32 
33 CDCTriggerTSFModule::CDCTriggerTSFModule() : Module::Module()
34 {
36  "The Track Segment Finder module of the CDC trigger.\n"
37  "Combines CDCHits from the same super layer to CDCTriggerSegmentHits.\n"
38  );
40  addParam("CDCHitCollectionName",
42  "Name of the input StoreArray of CDCHits.",
43  string("CDCHits4Trg"));
44  addParam("TSHitCollectionName",
46  "Name of the output StoreArray of CDCTriggerSegmentHits.",
47  string(""));
48  addParam("InnerTSLUTFile",
50  "The filename of LUT for track segments from the inner-most super layer",
51  string(""));
52  addParam("OuterTSLUTFile",
54  "The filename of LUT for track segments from the outer super layers",
55  string(""));
56  addParam("ClockSimulation",
58  "Switch to simulate each data clock cycle separately.",
59  false);
60  addParam("makeTrueLRTable",
62  "Switch to create a table of hit pattern <-> "
63  "number of true left / true right, which is needed to create the LUT",
64  false);
65  addParam("makeRecoLRTable",
66  m_makeRecoLRTable,
67  "Switch to create a table of hit pattern <-> "
68  "number of reconstructed left / true right, which is needed to create the LUT",
69  false);
70  addParam("innerTrueLRTableFilename",
72  "Filename for the true left/right table for the innermost super layer.",
73  string("innerTrueLRTable.dat"));
74  addParam("outerTrueLRTableFilename",
76  "Filename for the true left/right table for the outer super layers.",
77  string("outerTrueLRTable.dat"));
78  addParam("Deadchannel",
80  "Mask dead channels based on database. True:mask False:unmask",
81  true);
82  addParam("Crosstalk_tdcfilter",
84  "TDC based crosstalk filtering logic on CDCFE. True:enable False:disable",
85  false);
86  addParam("innerRecoLRTableFilename",
88  "Filename for the reconnstructed left/right table for the innermost super layer.",
89  string("innerRecoLRTable.dat"));
90  addParam("outerRecoLRTableFilename",
92  "Filename for the reconstructed left/right table for the outer super layers.",
93  string("outerRecoLRTable.dat"));
94  addParam("relateAllHits",
96  "Flag to relate all cdchits to the TrackSegment, not just the priority hits.",
97  true);
98  addParam("ADC_cut_enable",
99  m_adcflag,
100  "remove hits with lower ADC than cut threshold. True:enable False:disable",
101  false);
102  addParam("ADC_cut_threshold",
103  m_adccut,
104  "Threshold for the adc cut. Default: -1",
105  -1);
106 }
107 
108 void
110 {
111  // register DataStore elements
113  m_cdcHits.isRequired(m_CDCHitCollectionName);
114  if (m_makeTrueLRTable) {
115  StoreArray<CDCSimHit> simhits;
116  simhits.isRequired();
117  innerTrueLRTable.assign(pow(2, 16), vector<unsigned>(5, 0));
118  outerTrueLRTable.assign(pow(2, 12), vector<unsigned>(5, 0));
119  }
120  if (m_makeRecoLRTable) {
121  m_recoTracks.isRequired("RecoTracks");
122  innerRecoLRTable.assign(pow(2, 16), vector<unsigned>(5, 0));
123  outerRecoLRTable.assign(pow(2, 12), vector<unsigned>(5, 0));
124  }
125  // register relations
126  StoreArray<MCParticle> mcparticles;
128  mcparticles.registerRelationTo(m_segmentHits);
132  // Prepare track segment shapes.
133  // First a structure of wires is created for all layers and super layers.
134  // Each track segment consists of pointers to wires in this structure.
136  const unsigned nLayers = cdc.nWireLayers();
137  TRGClock* clockTDC = new TRGClock("CDCTrigger TDC clock", 0, 500. / cdc.getTdcBinWidth());
138  TRGClock* clockData = new TRGClock("CDCTrigger data clock", *clockTDC, 1, 16);
139  clocks.push_back(clockTDC);
140  clocks.push_back(clockData);
141 
142  //...Loop over layers...
143  int superLayerId = -1;
144  unsigned lastNWires = 0;
145  int lastShifts = -1000;
146  // separate counters for axial and stereo layers and super layers
147  int ia = -1;
148  int is = -1;
149  int ias = -1;
150  int iss = -1;
151  unsigned axialStereoLayerId;
152  unsigned axialStereoSuperLayerId = 0;
153  unsigned nWires = 0;
154  for (unsigned i = 0; i < nLayers; i++) {
155  if (i < cdc.getOffsetOfFirstLayer()) {
156  continue;
157  }
158  const unsigned nWiresInLayer = cdc.nWiresInLayer(i);
159 
160  //...Axial or stereo?...
161  int nShifts = cdc.nShifts(i);
162  bool axial = (nShifts == 0);
163  if (axial) ++ia;
164  else ++is;
165  axialStereoLayerId = (axial) ? ia : is;
166 
167  // Add empty TRGCDCLayer in case a superlayer is not present
168  if (superLayers.size() == 0 and cdc.getOffsetOfFirstSuperLayer() != 0) {
169  for (uint superLayerOffset = 0; superLayerOffset < cdc.getOffsetOfFirstSuperLayer(); superLayerOffset++) {
170  superLayers.push_back(vector<TRGCDCLayer*>());
171  superLayerId++;
172  }
173  }
174 
175  //...Is this in a new super layer?...
176  if ((lastNWires != nWiresInLayer) || (lastShifts != nShifts)) {
177  ++superLayerId;
178  superLayers.push_back(vector<TRGCDCLayer*>());
179  if (axial) ++ias;
180  else ++iss;
181  axialStereoSuperLayerId = (axial) ? ias : iss;
182  lastNWires = nWiresInLayer;
183  lastShifts = nShifts;
184  }
185 
186  //...Calculate radius of adjacent field wires...
187  const float swr = cdc.senseWireR(i);
188  const float innerRadius = cdc.fieldWireR(i - 1);
189  const float outerRadius = (i < nLayers - 1) ?
190  cdc.fieldWireR(i) :
191  swr + (swr - innerRadius);
192 
193  //...New layer...
194  TRGCDCLayer* layer = new TRGCDCLayer(i,
195  superLayerId,
196  superLayers[superLayerId].size(),
197  axialStereoLayerId,
198  axialStereoSuperLayerId,
199  cdc.zOffsetWireLayer(i),
200  nShifts,
201  M_PI * swr * swr / nWiresInLayer,
202  nWiresInLayer,
203  innerRadius,
204  outerRadius);
205  superLayers.back().push_back(layer);
206 
207  //...Loop over all wires in a layer...
208  for (unsigned j = 0; j < nWiresInLayer; j++) {
209  const P3D fp = P3D(cdc.wireForwardPosition(i, j).x(),
210  cdc.wireForwardPosition(i, j).y(),
211  cdc.wireForwardPosition(i, j).z());
212  const P3D bp = P3D(cdc.wireBackwardPosition(i, j).x(),
213  cdc.wireBackwardPosition(i, j).y(),
214  cdc.wireBackwardPosition(i, j).z());
215  TRGCDCWire* tw = new TRGCDCWire(nWires++, j, *layer, fp, bp, *clockTDC);
216  layer->push_back(tw);
217  }
218  }
219 
220  //...Make TSF's...
221  const unsigned nWiresInTS[2] = {15, 11};
222  const int shape[2][30] = {
223  {
224  -2, 0, // relative layer id, relative wire id
225  -1, -1,
226  -1, 0,
227  0, -1,
228  0, 0,
229  0, 1,
230  1, -2,
231  1, -1,
232  1, 0,
233  1, 1,
234  2, -2,
235  2, -1,
236  2, 0,
237  2, 1,
238  2, 2
239  },
240  {
241  -2, -1,
242  -2, 0,
243  -2, 1,
244  -1, -1,
245  -1, 0,
246  0, 0,
247  1, -1,
248  1, 0,
249  2, -1,
250  2, 0,
251  2, 1,
252  0, 0,
253  0, 0,
254  0, 0,
255  0, 0
256  }
257  };
258  const int layerOffset[2] = {5, 2};
259  unsigned id = 0;
260  unsigned idTS = 0;
261  for (unsigned i = 0; i < superLayers.size(); i++) {
262  if (i < cdc.getOffsetOfFirstSuperLayer()) {
263  TRGCDCLayer* emptylayer = new TRGCDCLayer();
264  tsLayers.push_back(emptylayer);
265  continue;
266  }
267  unsigned tsType = (i) ? 1 : 0;
268 
269  //...TS layer... w is a central wire
270  const TRGCDCCell* ww = superLayers[i][layerOffset[tsType]]->front();
271  TRGCDCLayer* layer = new TRGCDCLayer(id++, *ww);
272  tsLayers.push_back(layer);
273 
274  //...Loop over all wires in a central wire layer...
275  const unsigned nWiresInLayer = ww->layer().nCells();
276  B2DEBUG(100, "SL " << i << " layerOffset " << layerOffset[tsType] << ", "
277  << superLayers[i].size() << " layers, " << nWiresInLayer << " wires");
278  for (unsigned j = 0; j < nWiresInLayer; j++) {
279  const TRGCDCWire& w =
280  (TRGCDCWire&) superLayers[i][layerOffset[tsType]]->cell(j);
281 
282  const unsigned localId = w.localId();
283  const unsigned layerId = w.localLayerId();
284  vector<const TRGCDCWire*> cells;
285 
286  B2DEBUG(110, "TS localId " << localId << " layerId " << layerId);
287 
288  for (unsigned k = 0; k < nWiresInTS[tsType]; k++) {
289  const int laid = layerId + shape[tsType][k * 2];
290  const int loid = localId + shape[tsType][k * 2 + 1];
291 
292  B2DEBUG(120, "cell localId " << loid << " layerId " << laid);
293 
294  const TRGCDCWire& c =
295  (TRGCDCWire&) superLayers[i][laid]->cell(loid);
296 
297  cells.push_back(&c);
298  }
299 
300  TRGCDCSegment* ts;
301  if (w.superLayerId()) {
302  ts = new TRGCDCSegment(idTS++,
303  *layer,
304  w,
305  *clockData,
307  cells);
308  } else {
309  ts = new TRGCDCSegment(idTS++,
310  *layer,
311  w,
312  *clockData,
314  cells);
315  }
316  ts->initialize();
317  layer->push_back(ts);
318  }
319  }
320 
321 }
322 
323 void
325 {
326  if (m_deadchflag) {
327  if (not m_db_deadchannel.isValid()) {
328  StoreObjPtr<EventMetaData> evtMetaData;
329  B2ERROR("No database for CDCTRG dead channel mapping. Channel masking is skipped. exp " << evtMetaData->getExperiment() << " run "
330  << evtMetaData->getRun());
331  for (unsigned int i = 0; i < c_nSuperLayers; i++) { //SL
332  for (unsigned int j = 0; j < MAX_N_LAYERS; j++) { //Layer
333  for (unsigned int k = 0; k < c_maxNDriftCells; k++) { //
334  deadch_map[i][j][k] = true;
335  }
336  }
337  }
338  } else {
339  for (unsigned int i = 0; i < c_nSuperLayers; i++) { //SL
340  for (unsigned int j = 0; j < MAX_N_LAYERS; j++) { //Layer
341  for (unsigned int k = 0; k < c_maxNDriftCells; k++) { //
342  deadch_map[i][j][k] = m_db_deadchannel->getdeadch(i, j, k);
343  }
344  }
345  }
346  }
347  }
348 }
349 
350 void
352 {
354 
355  // fill CDCHits into track segment shapes
356 
357  //crosstalk filter
358  vector<int> filtered_hit;
359  for (int i = 0; i < m_cdcHits.getEntries(); ++i) {
360  filtered_hit.push_back(0);
361  }
362 
363  if (m_crosstalk_tdcfilter) {
364  //check number of hits in each asic
365  int ncdchit_asic[500][6] = {{0}};
366  vector<int> id_ncdchit_asic[500][6];
367  for (int i = 0; i < m_cdcHits.getEntries(); ++i) {
368  UChar_t lay = m_cdcHits[i]->getICLayer();
369  UShort_t IWire = m_cdcHits[i]->getIWire();
370  WireID wireid(lay, IWire);
371  int boardid = cdc.getBoardID(wireid);
372  int fechid = cdc.getChannelID(wireid);
373  int asicid = fechid / 8;
374  if (boardid >= 0 && boardid < 500 && asicid >= 0 && asicid < 6) {
375  ncdchit_asic[boardid][asicid]++;
376  id_ncdchit_asic[boardid][asicid].push_back(i);
377  }
378  }
379  //check 16ns time coinsidence if >=4 hits are found in the same asic
380  for (int i = 0; i < 500; i++) {
381  for (int j = 0; j < 6; j++) {
382  if (ncdchit_asic[i][j] >= 4) {
383  std::vector<short> tdc_asic;
384  for (int k = 0; k < ncdchit_asic[i][j]; k++) {
385  short tdc = m_cdcHits[id_ncdchit_asic[i][j][k]]->getTDCCount();
386  tdc_asic.push_back(tdc);
387  }
388  std::sort(tdc_asic.begin(), tdc_asic.end());
389  for (int ncoin = ncdchit_asic[i][j]; ncoin >= 4; ncoin--) {
390  bool breakOuterLoop = false;
391  for (int k = 0; k < ncdchit_asic[i][j] - ncoin; k++) {
392  if (tdc_asic[k + ncoin - 1] - tdc_asic[k] <= 16) {
393  for (int l = k; l < k + ncoin - 1; l++) {
394  filtered_hit[id_ncdchit_asic[i][j][l]] = 1;
395  }
396  breakOuterLoop = true;
397  break;
398  }
399  }
400  if (breakOuterLoop)
401  break;
402  }
403  tdc_asic.clear();
404  }
405  }
406  }
407  }
408 
409  //...Loop over CDCHits...
410  for (int i = 0; i < m_cdcHits.getEntries(); ++i) {
411  // get the wire
412  const CDCHit& h = *m_cdcHits[i];
413  // mask dead channel
414  if (m_deadchflag) {
415  if (!deadch_map[h.getISuperLayer()][h.getILayer()][h.getIWire()]) {
416  continue;
417  }
418  }
419  // skim crosstalk hit
420  if (filtered_hit[i] == 1)continue;
421 
422  // remove hits with low ADC
423  if (m_adcflag) {
424  if (h.getADCCount() < m_adccut)continue;
425  }
426 
427  TRGCDCWire& w =
428  (TRGCDCWire&) superLayers[h.getISuperLayer()][h.getILayer()]->cell(h.getIWire());
429 
430  // trigger timing signal
431  const int tdcCount = floor((cdc.getT0(WireID(h.getID())) / cdc.getTdcBinWidth()
432  - h.getTDCCount() + 0.5) / 2);
433  TRGTime rise = TRGTime(tdcCount, true, w.signal().clock(), w.name());
434  TRGTime fall = rise;
435  fall.shift(1).reverse();
436  TRGSignal signal = rise & fall;
437  w.addSignal(signal);
438 
439  if (w.hit()) continue;
440  // make a trigger wire hit (needed for relations)
441  // all unneeded variables are set to 0 (TODO: remove them completely?)
442  TRGCDCWireHit* hit = new TRGCDCWireHit(w, i,
443  0, 0, 0, 0, 0, 0, 0, 0);
444  w.hit(hit);
445  }
446 
447 
448 
449  // neibor supression
450  unsigned neibor_hit[10][1000] = {};
451  for (unsigned isl = 0; isl < tsLayers.size(); ++isl) {
452  for (unsigned its = 0; its < tsLayers[isl]->nCells(); ++its) {
453  TRGCDCSegment& s = (TRGCDCSegment&) tsLayers[isl]->cell(its);
454  // simulate with logicLUTFlag = true
455  // TODO: either add parameter or remove the option in Segment::simulate()
456  s.simulate(m_clockSimulation, true,
458  if (!m_clockSimulation && s.signal().active() && s.priorityPosition() == 3) {
459  neibor_hit[isl][its] = 1;
460  }
461  }
462  }
463 
464  // simulate track segments and create track segment hits
465  for (unsigned isl = 0; isl < tsLayers.size(); ++isl) {
466  for (unsigned its = 0; its < tsLayers[isl]->nCells(); ++its) {
467  TRGCDCSegment& s = (TRGCDCSegment&) tsLayers[isl]->cell(its);
468  // simulate with logicLUTFlag = true
469  // TODO: either add parameter or remove the option in Segment::simulate()
470  s.simulate(m_clockSimulation, true,
472  // store hits and create relations
473  // for clock simulation already done in simulate
474  // TODO: move it to simulate also for simulateWithoutClock?
475  if (!m_clockSimulation && s.signal().active()) {
476 
477  //neibor supression
478  if (s.priorityPosition() != 3 && (neibor_hit[isl][(its - 1) % tsLayers[isl]->nCells()] == 1
479  || neibor_hit[isl][(its + 1) % tsLayers[isl]->nCells()] == 1))continue;
480 
481  const CDCHit* priorityHit = m_cdcHits[s.priority().hit()->iCDCHit()];
482  const CDCTriggerSegmentHit* tsHit =
483  m_segmentHits.appendNew(*priorityHit,
484  s.id(),
485  s.priorityPosition(),
486  s.LUT()->getValue(s.lutPattern()),
487  s.priorityTime(),
488  s.fastestTime(),
489  s.foundTime());
490  unsigned short adcSum = 0;
491  // relation to all CDCHits in segment
492  for (unsigned iw = 0; iw < s.wires().size(); ++iw) {
493  const TRGCDCWire* wire = (TRGCDCWire*)s[iw];
494  if (wire->signal().active()) {
495  // priority wire has relation weight 2
496  double weight = (wire == &(s.priority())) ? 2. : 1.; // not sure if this is needed..
497  if (weight == 2. || m_relateAllHits) {
498  tsHit->addRelationTo(m_cdcHits[wire->hit()->iCDCHit()], weight);
499  adcSum += m_cdcHits[wire->hit()->iCDCHit()]->getADCCount();
500  }
501  }
502  }
503  // relation to MCParticles (same as priority hit)
505  for (unsigned imc = 0; imc < mcrel.size(); ++imc) {
506  mcrel[imc]->addRelationTo(tsHit, mcrel.weight(imc));
507  }
508  // get true left/right
509  if (m_makeTrueLRTable) {
510  const CDCSimHit* simHit = priorityHit->getRelatedFrom<CDCSimHit>();
511  if (simHit && !simHit->getBackgroundTag()) {
512  if (isl == 0) {
513  B2DEBUG(100, its << " creating entry in TrueLUT for pattern: " << s.lutPattern() << " : " << simHit->getLeftRightPassage());
514  innerTrueLRTable[s.lutPattern()][simHit->getLeftRightPassage()] += 1;
515  innerTrueLRTable[s.lutPattern()][3] += tsHit->priorityTime();
516  innerTrueLRTable[s.lutPattern()][4] += adcSum;
517  } else {
518  outerTrueLRTable[s.lutPattern()][simHit->getLeftRightPassage()] += 1;
519  outerTrueLRTable[s.lutPattern()][3] += tsHit->priorityTime();
520  outerTrueLRTable[s.lutPattern()][4] += adcSum;
521  B2DEBUG(100, its << " creating entry in TrueLUT for pattern: " << s.lutPattern() << " : " << simHit->getLeftRightPassage());
522  }
523  } else {
524  if (isl == 0) {
525  B2DEBUG(100, its << " creating bghit in TrueLUT for pattern: " << s.lutPattern());
526  innerTrueLRTable[s.lutPattern()][2] += 1;
527  innerTrueLRTable[s.lutPattern()][3] += tsHit->priorityTime();
528  innerTrueLRTable[s.lutPattern()][4] += adcSum;
529  } else {
530  B2DEBUG(100, its << " creating bghit in TrueLUT for pattern: " << s.lutPattern());
531  outerTrueLRTable[s.lutPattern()][2] += 1;
532  outerTrueLRTable[s.lutPattern()][3] += tsHit->priorityTime();
533  outerTrueLRTable[s.lutPattern()][4] += adcSum;
534  }
535  }
536  }
537 
538  if (m_makeRecoLRTable) {
539  // for the recotable, we have no simhits and w can have more than one recotrack per event
540  // so wee need to loop over them:
541  unsigned lrflag = 2; // see explanation below
542  for (int ireco = 0; ireco < m_recoTracks.getEntries(); ++ireco) {
543  // std::cout << "recotrack " << ireco << " of " << m_recoTracks.getEntries());
544  RecoTrack* recoTrack = m_recoTracks[ireco];
545  // since there is no relation between recotracks and the tshits yet, we need to create them first.
546  // within the recotrack class, there is a function which returns the hitids of the cdchits used
547  // in the recotrack. now we can loop over them and compare them with the id from the priorityhit:
548  // /
549  // Before looping over the recotracks, we set the rl information to 'bkg hit'. Then, we loop over all
550  // recotracks and determine if there is a relation and wether it passed left or right. If this is set for
551  // one recotrack, we set the rl information to the corresponding value. if it is set for another recotrack,
552  // we will also use this information for the recolrtable and set the corresponding value again.
553  // Just in the case, where after the loop over all recotracks it wasn't related to any of them, we will set
554  // the background flag in the recolrtable.
555  vector<CDCHit*> cdcHits = recoTrack->getCDCHitList();
556  bool related = false;
557  for (unsigned iHit = 0; iHit < cdcHits.size(); ++iHit) {
558 //std::cout << "now looping over cdchits... " << iHit << "/" << cdcHits.size() << std::endl;
559  if (tsHit->getID() == cdcHits[iHit]->getID()) {
560  // check, wether recotrack is already related to ts, skip in this case.
561  // this is necessary because sometimes two wires are related to the same ts // dont get it, should be uneccessary
562  if (related == false) related = true;
563  else continue;
564 // std::cout << "ts " << tsHit->getID() << " : creating relation to recotrack " << ireco;
565  // std::cout << tsHit->getID() << " " << cdcHits[iHit]->getID() << " " << iHit << " matching id of priohit and current cdchit, creating relation... " << std::endl;
566  recoTrack->addRelationTo(tsHit);
567  tsHit->addRelationTo(recoTrack);
568  if (isl == 0) {
569  // this getrightleftinformation function returns 2 for a right pass, and 3 for a left pass
570  if (recoTrack->getRightLeftInformation(cdcHits[iHit]) == 3) lrflag = 0;
571  if (recoTrack->getRightLeftInformation(cdcHits[iHit]) == 2) lrflag = 1;
572  innerRecoLRTable[s.lutPattern()][lrflag] += 1;
573  innerRecoLRTable[s.lutPattern()][3] += tsHit->priorityTime();
574  innerRecoLRTable[s.lutPattern()][4] += adcSum;
575  B2DEBUG(100, its << " creating entry in recoLUT for pattern: " << s.lutPattern() << " : " << lrflag << " (recotrack " << ireco <<
576  "), hit: " << iHit);
577  } else {
578  if (recoTrack->getRightLeftInformation(cdcHits[iHit]) == 3) lrflag = 0;
579  if (recoTrack->getRightLeftInformation(cdcHits[iHit]) == 2) lrflag = 1;
580  outerRecoLRTable[s.lutPattern()][lrflag] += 1;
581  outerRecoLRTable[s.lutPattern()][3] += tsHit->priorityTime();
582  outerRecoLRTable[s.lutPattern()][4] += adcSum;
583  B2DEBUG(100, its << " creating entry in recoLUT for pattern: " << s.lutPattern() << " : " << lrflag << " (recotrack " << ireco <<
584  "), hit: " << iHit);
585  }
586 //std::cout << " , lrflag: " << lrflag << ", 0=left, 1=right";
587  //break;
588  }
589  }
590  }
591  if (lrflag == 2) {
592  if (isl == 0) {
593  B2DEBUG(100, its << " creating bghit in recoLUT for pattern: " << s.lutPattern());
594  innerRecoLRTable[s.lutPattern()][2] += 1;
595  innerRecoLRTable[s.lutPattern()][3] += tsHit->priorityTime();
596  innerRecoLRTable[s.lutPattern()][4] += adcSum;
597  } else {
598  B2DEBUG(100, its << " creating bghit in recoLUT for pattern: " << s.lutPattern());
599  outerRecoLRTable[s.lutPattern()][2] += 1;
600  outerRecoLRTable[s.lutPattern()][3] += tsHit->priorityTime();
601  outerRecoLRTable[s.lutPattern()][4] += adcSum;
602 
603  }
604  //std::cout << " , lrflag: " << lrflag << ", 0=left, 1=right, 2=bg";
605  }
606  //std::cout << std::endl;
607  }
608  }
609  }
610  }
611 
612  //...Clear hit information after we're finished...
613  clear();
614 }
615 
616 void
618 {
619  // delete clocks
620  for (unsigned ic = 0; ic < clocks.size(); ++ic) {
621  delete clocks[ic];
622  }
623  clocks.clear();
624 
625  // delete wire layers
626  for (unsigned isl = 0; isl < superLayers.size(); ++isl) {
627  for (unsigned il = 0; il < superLayers[isl].size(); ++il) {
628  for (unsigned iw = 0; iw < superLayers[isl][il]->nCells(); ++iw) {
629  delete &(superLayers[isl][il]->cell(iw));
630  }
631  delete superLayers[isl][il];
632  }
633  superLayers[isl].clear();
634  }
635  superLayers.clear();
636 
637  // delete TS layers
638  for (unsigned isl = 0; isl < tsLayers.size(); ++isl) {
639  for (unsigned its = 0; its < tsLayers[isl]->nCells(); ++its) {
640  delete &(tsLayers[isl]->cell(its));
641  }
642  delete tsLayers[isl];
643  }
644  tsLayers.clear();
645 
646  // save true left/right table
647  if (m_makeTrueLRTable) {
648  ofstream innerFile(m_innerTrueLRTableFilename);
649  ostream_iterator<unsigned> innerIterator(innerFile, " ");
650  for (unsigned pattern = 0; pattern < innerTrueLRTable.size(); ++pattern) {
651  copy(innerTrueLRTable[pattern].begin(), innerTrueLRTable[pattern].end(),
652  innerIterator);
653  innerFile << "\n";
654  }
655  ofstream outerFile(m_outerTrueLRTableFilename);
656  ostream_iterator<unsigned> outerIterator(outerFile, " ");
657  for (unsigned pattern = 0; pattern < outerTrueLRTable.size(); ++pattern) {
658  copy(outerTrueLRTable[pattern].begin(), outerTrueLRTable[pattern].end(),
659  outerIterator);
660  outerFile << "\n";
661  }
662  }
663 
664  // save reco left/right table
665  if (m_makeRecoLRTable) {
666  ofstream innerFile(m_innerRecoLRTableFilename);
667  ostream_iterator<unsigned> innerIterator(innerFile, " ");
668  for (unsigned pattern = 0; pattern < innerRecoLRTable.size(); ++pattern) {
669  copy(innerRecoLRTable[pattern].begin(), innerRecoLRTable[pattern].end(),
670  innerIterator);
671  innerFile << "\n";
672  }
673  ofstream outerFile(m_outerRecoLRTableFilename);
674  ostream_iterator<unsigned> outerIterator(outerFile, " ");
675  for (unsigned pattern = 0; pattern < outerRecoLRTable.size(); ++pattern) {
676  copy(outerRecoLRTable[pattern].begin(), outerRecoLRTable[pattern].end(),
677  outerIterator);
678  outerFile << "\n";
679  }
680  }
681 }
682 
683 void
685 {
687  for (unsigned isl = 0; isl < superLayers.size(); ++isl) {
688  if (isl < cdc.getOffsetOfFirstSuperLayer()) {
689  continue;
690  }
691  for (unsigned il = 0; il < superLayers[isl].size(); ++il) {
692  for (unsigned iw = 0; iw < superLayers[isl][il]->nCells(); ++iw) {
693  TRGCDCWire& w = (TRGCDCWire&) superLayers[isl][il]->cell(iw);
694  delete w.hit();
695  w.clear();
696  }
697  }
698  for (unsigned its = 0; its < tsLayers[isl]->nCells(); ++its) {
699  TRGCDCSegment& s = (TRGCDCSegment&) tsLayers[isl]->cell(its);
700  s.clear();
701  }
702  }
703 
704 }
Class containing the result of the unpacker in raw data and the result of the digitizer in simulation...
Definition: CDCHit.h:40
Example Detector.
Definition: CDCSimHit.h:21
int getLeftRightPassage() const
The method to get new left/right info. for tracking.
Definition: CDCSimHit.h:238
Combination of several CDCHits to a track segment hit for the trigger.
short priorityTime() const
get hit time of priority cell in trigger clocks
unsigned short getID() const
get the encoded wire number of the priority wire.
std::string m_outerRecoLRTableFilename
filename for the table which contains the number of reconstructed left/right for each pattern in the ...
std::vector< TRGCDCLayer * > tsLayers
structure to hold pointers to all track segment shapes
bool m_relateAllHits
relate all cdchtis to ts, not just opriority wire
bool m_clockSimulation
switch for simulating clock by clock
std::string m_CDCHitCollectionName
name of the input StoreArray
std::string m_outerTrueLRTableFilename
filename for the table which contains the number of true left/right for each pattern in the outer sup...
bool m_crosstalk_tdcfilter
TDC based crosstalk filtering logic on CDCFE.
virtual void initialize() override
Initialize the module and register DataStore arrays.
std::string m_innerRecoLRTableFilename
filename for the table which contains the number of reconstructed left/right for each pattern in the ...
bool m_adcflag
remove hits with lower ADC than cut threshold.
virtual void event() override
Run the TSF for an event.
bool deadch_map[c_nSuperLayers][MAX_N_LAYERS][c_maxNDriftCells]
bad channel mapping
OptionalDBObjPtr< CDCTriggerDeadch > m_db_deadchannel
dbobject to store deadchannel
StoreArray< CDCTriggerSegmentHit > m_segmentHits
list of output track segment hits
std::vector< std::vector< unsigned > > outerRecoLRTable
list of (# true right, # true left, # true background) for the outer super layers
virtual void terminate() override
Clean up pointers.
std::vector< std::vector< unsigned > > outerTrueLRTable
list of (# true right, # true left, # true background) for the outer super layers
std::string m_innerTSLUTFilename
The filename of LUT for the inner-most track segments.
virtual void beginRun() override
Register run-dependent DataStore arrays.
std::vector< std::vector< unsigned > > innerRecoLRTable
list of (# reconstructed right, # reconstructed left, # unrelated background) for the inner-most supe...
std::vector< std::vector< unsigned > > innerTrueLRTable
list of (# true right, # true left, # true background) for the inner-most super layer
int m_adccut
threshold for the adc cut.
bool m_makeTrueLRTable
switch for saving the number of true left/right for each pattern
std::string m_TSHitCollectionName
name of the output StoreArray
StoreArray< CDCHit > m_cdcHits
list of input CDC hits
StoreArray< RecoTrack > m_recoTracks
list of recotracks, needed for recolrtable
void clear()
remove hit information from last event
std::string m_outerTSLUTFilename
The filename of LUT for outer track segments.
std::vector< TRGClock * > clocks
list of clocks used in the TSF
std::string m_innerTrueLRTableFilename
filename for the table which contains the number of true left/right for each pattern in the inner-mos...
std::vector< std::vector< TRGCDCLayer * > > superLayers
structure to hold pointers to all wires in the CDC
bool m_deadchflag
mask Dead channel or not.
The Class for CDC Geometry Parameters.
static CDCGeometryPar & Instance(const CDCGeometry *=nullptr)
Static method to get a reference to the CDCGeometryPar instance.
A Class to store the Monte Carlo particle information.
Definition: MCParticle.h:32
Base class for Modules.
Definition: Module.h:72
void setDescription(const std::string &description)
Sets the description of the module.
Definition: Module.cc:214
void setPropertyFlags(unsigned int propertyFlags)
Sets the flags for the module properties.
Definition: Module.cc:208
@ c_ParallelProcessingCertified
This module can be run in parallel processing mode safely (All I/O must be done through the data stor...
Definition: Module.h:80
This is the Reconstruction Event-Data Model Track.
Definition: RecoTrack.h:79
RightLeftInformation getRightLeftInformation(const HitType *hit) const
Return the right left information of a given hit (every type) or throws an exception of the hit is no...
Definition: RecoTrack.h:339
std::vector< Belle2::RecoTrack::UsedCDCHit * > getCDCHitList() const
Return an unsorted list of cdc hits.
Definition: RecoTrack.h:455
Class for type safe access to objects that are referred to in relations.
size_t size() const
Get number of relations.
float weight(int index) const
Get weight with index.
void addRelationTo(const RelationsInterface< BASE > *object, float weight=1.0, const std::string &namedRelation="") const
Add a relation from this object to another object (with caching).
RelationVector< FROM > getRelationsFrom(const std::string &name="", const std::string &namedRelation="") const
Get the relations that point from another store array to this object.
FROM * getRelatedFrom(const std::string &name="", const std::string &namedRelation="") const
Get the object from which this object has a relation.
virtual unsigned short getBackgroundTag() const
Get background tag.
Definition: SimHitBase.h:46
bool isRequired(const std::string &name="")
Ensure this array/object has been registered previously.
bool registerInDataStore(DataStore::EStoreFlags storeFlags=DataStore::c_WriteOut)
Register the object/array in the DataStore.
Accessor to arrays stored in the data store.
Definition: StoreArray.h:113
T * appendNew()
Construct a new T object at the end of the array.
Definition: StoreArray.h:246
int getEntries() const
Get the number of objects in the array.
Definition: StoreArray.h:216
bool registerRelationTo(const StoreArray< TO > &toArray, DataStore::EDurability durability=DataStore::c_Event, DataStore::EStoreFlags storeFlags=DataStore::c_WriteOut, const std::string &namedRelation="") const
Register a relation to the given StoreArray.
Definition: StoreArray.h:140
Type-safe access to single objects in the data store.
Definition: StoreObjPtr.h:96
A class to represent a wire in CDC.
Definition: Cell.h:40
A class to represent a cell layer.
Definition: Layer.h:33
A class to represent a wire in CDC.
Definition: Segment.h:39
A class to represent a wire hit in CDC.
Definition: WireHit.h:33
A class to represent a wire in CDC.
Definition: Wire.h:56
A class to represent a digitized signal. Unit is nano second.
Definition: Clock.h:38
A class to represent a digitized signal. Unit is nano second.
Definition: Signal.h:23
A class to represent a signal timing in the trigger system.
Definition: Time.h:25
Class to identify a wire inside the CDC.
Definition: WireID.h:34
void addParam(const std::string &name, T &paramVariable, const std::string &description, const T &defaultValue)
Adds a new parameter to the module.
Definition: Module.h:560
#define REG_MODULE(moduleName)
Register the given module (without 'Module' suffix) with the framework.
Definition: Module.h:650
TRGTime & reverse(void)
reverse edge.
Definition: Time.h:141
const TRGSignal & signal(void) const override
returns an input to the trigger. This is sync'ed to 1GHz clock.
Definition: Wire.h:226
TRGTime & shift(int unit)
delays by clock unit.
Definition: Time.h:163
const TRGCDCWireHit * hit(void) const
returns a pointer to a TRGCDCWireHit.
Definition: Wire.h:144
void initialize(void)
initilize variables.
Definition: Segment.cc:65
unsigned iCDCHit(void) const
returns an index to CDCHit.
Definition: CellHit.h:360
const TRGCDCLayer & layer(void) const
returns a pointer to a layer.
Definition: Cell.h:232
bool active(void) const
returns true if there is a signal.
Definition: Signal.h:277
unsigned nCells(void) const
returns # of cells.
Definition: Layer.h:194
Abstract base class for different kinds of events.