Belle II Software  release-08-01-10
TrackSegmentFinder.h
1 /**************************************************************************
2  * basf2 (Belle II Analysis Software Framework) *
3  * Author: The Belle II Collaboration *
4  * *
5  * See git log for contributors and copyright holders. *
6  * This file is licensed under LGPL-3.0, see LICENSE.md. *
7  **************************************************************************/
8 
9 //-----------------------------------------------------------------------------
10 // Description : A class to find Track Segments
11 //-----------------------------------------------------------------------------
12 
13 #ifndef TRGCDCTrackSegmentFinder_FLAG_
14 #define TRGCDCTrackSegmentFinder_FLAG_
15 
16 #include <TFile.h>
17 #include <TTree.h>
18 #include <TClonesArray.h>
19 #include "trg/trg/Board.h"
20 #include "trg/trg/SignalVector.h"
21 #include "trg/trg/SignalBundle.h"
22 
23 #ifdef TRGCDC_SHORT_NAMES
24 #define TCTSFinder TRGCDCTrackSegmentFinder
25 #define TSFinder TRGCDCTrackSegmentFinder
26 #endif
27 
28 namespace Belle2 {
34  class TRGCDC;
35  class TRGCDCSegment;
36  class TRGCDCSegmentHit;
37  class TRGCDCMerger;
38 
41  : public TRGBoard,
42  public std::vector <const TRGCDCMerger*> {
43 
44  public:
46  enum boardType {
47  innerType = 0,
48  outerType = 1,
49  unknown = 999
50  };
51 
54  bool makeRootFile,
55  bool logicLUTFlag);
56 
59  const std::string& name,
61  const TRGClock& systemClock,
62  const TRGClock& dataClock,
63  const TRGClock& userClockInput,
64  const TRGClock& userClockOutput,
65  const std::vector<TRGCDCSegment*>& tsSL);
66 
69 
70 
72  void doit(std::vector<TRGCDCSegment* >& tss, const bool trackSegmentClockSimulation,
73  std::vector<TRGCDCSegmentHit* >& segmentHits, std::vector<TRGCDCSegmentHit* >* segmentHitsSL);
75  void terminate(void);
77  void saveTSInformation(std::vector<TRGCDCSegment* >& tss);
79  void saveTSFResults(std::vector<TRGCDCSegmentHit* >* segmentHitsSL);
81  void saveNNTSInformation(std::vector<TRGCDCSegment* >& tss);
82 
83 
85  const TRGCDC& _cdc;
88 
90  std::string m_rootTSFFilename;
92  TFile* m_fileTSF;
93 
95  TTree* m_treeInputTSF = nullptr;
98  // Stores hitpattern information. 9 components
99  // [mc particle id, superlayer id, hitpattern, priorityLR, priorityPhi, secondPriorityRLR, secondPriorityRPhi, secondPriorityLLR, secondPriorityLPhi]
101  TClonesArray* m_hitPatternInformation = nullptr;
102 
104  TTree* m_treeOutputTSF = nullptr;
107  TClonesArray* m_particleEfficiency = nullptr;
109  TClonesArray* m_tsInformation = nullptr;
110 
112  TTree* m_treeNNTSF = nullptr;
114  TClonesArray* m_nnPatternInformation = nullptr;
115 
117  bool m_makeRootFile = false;
118 
119  public:
120 
122  static std::string version(void);
123 
124 // /// Make bit pattern for Inner-most Tracker
125 // static TRGState packerInnerTracker(const TRGState & input);
126 //
127 // /// Make bit pattern for Outer Tracker
128 // static TRGState packerOuterTracker(const TRGState & input);
129 //
130 // /// Make bit pattern for Inner-most EvtTime & Low Pt Tracker
131 // static TRGState packerInnerEvt(const TRGState & input);
132 //
133 // /// Make bit pattern for Outer EvtTime & Low Pt Tracker
134 // static TRGState packerOuterEvt(const TRGState & input);
135 
137  vector<TRGSignalVector*> findTSHit(TRGSignalVector* eachInput, int);
138 
140  TRGSignalVector* packerOuterTracker(vector<TRGSignalVector*>&,
141  vector<int>&,
142  const unsigned);
143 
145  TRGSignalVector* packerOuterEvt(vector<TRGSignalVector*>, vector<int>, int);
147  boardType type(void) const;
148 
150  TRGSignalBundle* outputE(void) {return _tosbE;};
152  TRGSignalBundle* outputT(void) {return _tosbT;};
153 
155  void push_back(const TRGCDCMerger*);
156 
158  void simulateBoard(void);
159 
161  void simulate(void);
162 
164  void simulate2(void);
165 
167  void hitMapInner(void);
168 
170  void hitMapOuter(void);
171 
173  void inputInner(const unsigned id,
174  const unsigned nTSF,
175  TRGSignalVector* s);
176 
178  void inputOuter(const unsigned id,
179  const unsigned nTSF,
180  TRGSignalVector* s);
181 
183  vector<TRGSignalVector*> simulateInner(const TRGSignalVector& in,
184  unsigned id);
185 
187  vector<TRGSignalVector*> simulateOuter(TRGSignalVector* in,
188  unsigned id);
189 
191  vector<TRGSignalVector*> simulateTSFOld(TRGSignalVector* in,
192  unsigned id);
193 
195  vector<TRGSignalVector*> simulateTSF(TRGSignalVector* in,
196  unsigned id);
197 
199  vector<TRGSignalVector*> simulateTSF2(TRGSignalVector* in,
200  unsigned id);
201 
203  TRGSignalVector* packerForTracker(vector<TRGSignalVector*>&,
204  vector<int>&,
205  const unsigned);
206 
208  TRGSignalVector* packerForETF(vector<TRGSignalVector*>&,
209  vector<int>&,
210  const unsigned);
212  double mkint(TRGState);
213 
215  vector<bool> mkbool(int, int);
216 
217  private:
218 
220  void simulateInner(void);
221 
223  void simulateOuter(void);
224 
226  void priorityTiming(unsigned tsfID,
227  const unsigned nTSF,
228  TRGSignalVector& s,
229  const TRGSignal& center,
230  const TRGSignal& right,
231  const TRGSignal& left) const;
232 
234  void fastestTimingInner(unsigned tsfID,
235  const unsigned nTSF,
236  TRGSignalVector& s) const;
237 
239  void fastestTimingOuter(unsigned tsfID,
240  const unsigned nTSF,
241  TRGSignalVector& s) const;
242 
244  static void addID(TRGSignalVector& s, unsigned id);
245 
246  private:
247 
250 
252  //TRGSignalBundle * _tisb;
253 
259  std::vector<TCSegment*> _tsSL;
260 
262  std::vector<TRGSignalVector*> _tsfIn;
263 
265  std::vector<TRGSignalVector*> _tsfOut;
266 
268  std::vector<TRGSignalVector*> _toBeDeleted;
269 
271  std::vector<TRGSignal* > _hitMap[5];
272 
274  std::vector<TRGSignal* > _priMap;
275 
277  std::vector<TRGSignal* > _fasMap;
278 
280  std::vector<TRGSignal* > _secMap;
281 
283  std::vector<TRGSignal* > _edg0Map;
284 
286  std::vector<TRGSignal* > _edg1Map;
287 
289  std::vector<TRGSignal* > _edg2Map;
290 
292  std::vector<TRGSignal* > _edg3Map;
293 
295  std::vector<TRGSignal* > _edg4Map;
296  };
297 
299 } // namespace Belle2
300 
301 #endif
A class to represent a trigger board.
Definition: Board.h:25
A class to represent a CDC merger board.
Definition: Merger.h:36
a class of TrackSegmentFinder in TRGCDC
TRGSignalBundle * _tosbE
Input signal bundle.
std::vector< TRGSignal * > _priMap
Internal data of the priority hit timing.
TClonesArray * m_hitPatternInformation
Stores hitpattern information.
std::vector< TRGSignal * > _edg4Map
Internal data of the edge timing information.
std::vector< TRGSignal * > _edg0Map
Internal data of the edge timing information.
TRGSignalBundle * outputE(void)
signal bundle of outputE
TTree * m_treeInputTSF
ROOT TTree for input.
TRGSignalBundle * _tosbT
Output signal bundle.
bool m_makeRootFile
make ROOT file or not
static std::string version(void)
return version
TClonesArray * m_particleEfficiency
[Efficiency, Pt, # MC TS] Efficiency = -1 means that # MC TS is 0.
std::vector< TRGSignalVector * > _toBeDeleted
One time info. to be deleted in next event;.
TRGSignalVector * packerForETF(vector< TRGSignalVector * > &, vector< int > &, const unsigned)
Output packer for ETF.
std::string m_rootTSFFilename
ROOT file name string.
std::vector< TRGSignal * > _edg1Map
Internal data of the edge timing information.
TClonesArray * m_nnPatternInformation
[superlayer id, lrDriftTime, timeWire0, timeWire1, ..., ...]
TTree * m_treeOutputTSF
ROOT TTree for output.
std::vector< TRGSignal * > _edg2Map
Internal data of the edge timing information.
TClonesArray * m_tsInformation
[SuperLayer Id, Wire Id, Priority Timing]
std::vector< TRGSignalVector * > _tsfOut
TSF response storeage.
std::vector< TRGSignal * > _hitMap[5]
Internal data of wire hit map.
TTree * m_treeNNTSF
ROOT Tree for NNTSF.
std::vector< TRGSignal * > _secMap
Internal data of the priority cell hit position flag.
std::vector< TCSegment * > _tsSL
list of TSF
std::vector< TRGSignalVector * > _tsfIn
TSF input storage.
void simulateBoard(void)
firmware simulation.
std::vector< TRGSignal * > _edg3Map
Internal data of the edge timing information.
TRGSignalBundle * outputT(void)
signal bundle of outputT
bool m_logicLUTFlag
0 is Logic. 1 is LUT.
std::vector< TRGSignal * > _fasMap
Internal data of the fastest hit timing.
boardType
enum of boardType of TrackSegmentFinder
The instance of TRGCDC is a singleton.
Definition: TRGCDC.h:69
A class to represent a digitized signal. Unit is nano second.
Definition: Clock.h:38
A class to represent a bundle of SignalVectors.
Definition: SignalBundle.h:26
A class to represent a bundle of digitized signals.
Definition: SignalVector.h:26
A class to represent a digitized signal. Unit is nano second.
Definition: Signal.h:23
A class to represent a state of multi bits.
Definition: State.h:24
vector< TRGSignalVector * > simulateTSFOld(TRGSignalVector *in, unsigned id)
Simulate TSF response (unified version)
void fastestTimingOuter(unsigned tsfID, const unsigned nTSF, TRGSignalVector &s) const
Make TRGSignals for the fastest timing bits.
void simulateOuter(void)
Firmware simulation for the outers. yi.
TRGSignalVector * packerOuterTracker(vector< TRGSignalVector * > &, vector< int > &, const unsigned)
Packing output for tracker.
void priorityTiming(unsigned tsfID, const unsigned nTSF, TRGSignalVector &s, const TRGSignal &center, const TRGSignal &right, const TRGSignal &left) const
Make TRGSignals for the priority timing bits.
TRGSignalVector * packerForTracker(vector< TRGSignalVector * > &, vector< int > &, const unsigned)
Output packer for tracker.
void push_back(const TRGCDCMerger *)
push back the Mergers of this TSF
vector< TRGSignalVector * > findTSHit(TRGSignalVector *eachInput, int)
Use LUT for find TSHit.
vector< TRGSignalVector * > simulateTSF(TRGSignalVector *in, unsigned id)
Simulate TSF response (unified version, 2016/07/12)
void inputOuter(const unsigned id, const unsigned nTSF, TRGSignalVector *s)
Creates input signals to TSF for the outer.
const std::string & name(void) const
returns name.
Definition: Board.h:109
TRGCDCTrackSegmentFinder(const TRGCDC &, bool makeRootFile, bool logicLUTFlag)
Constructor.
void simulateInner(void)
Firmware simulation for the outers. yi.
void saveTSFResults(std::vector< TRGCDCSegmentHit * > *segmentHitsSL)
save result of TSF
static void addID(TRGSignalVector &s, unsigned id)
Add TSF ID to timing signal vector for the output.
void saveTSInformation(std::vector< TRGCDCSegment * > &tss)
save the TS info
void hitMapOuter(void)
Creates the hit maps for the outer.
void simulate2(void)
Firmware simulation. Unified version of inner and outer : yi.
void doit(std::vector< TRGCDCSegment * > &tss, const bool trackSegmentClockSimulation, std::vector< TRGCDCSegmentHit * > &segmentHits, std::vector< TRGCDCSegmentHit * > *segmentHitsSL)
Member functions of doing TSF.
void inputInner(const unsigned id, const unsigned nTSF, TRGSignalVector *s)
Creates input signals to TSF for the inner.
vector< TRGSignalVector * > simulateTSF2(TRGSignalVector *in, unsigned id)
Simulate TSF response (unified version, state machine)
void saveNNTSInformation(std::vector< TRGCDCSegment * > &tss)
Saves NNTS information. Only when ts is hit.
void simulate(void)
Firmware simulation. yi.
void hitMapInner(void)
Creates the hit maps for the inner.
TRGSignalVector * packerOuterEvt(vector< TRGSignalVector * >, vector< int >, int)
Packing output for evtTime & Low pT.
double mkint(TRGState)
tranformatoin into integer
boardType type(void) const
board type of TSF
void fastestTimingInner(unsigned tsfID, const unsigned nTSF, TRGSignalVector &s) const
Make TRGSignals for the fastest timing bits.
vector< bool > mkbool(int, int)
tranformatoin into bool
Abstract base class for different kinds of events.